Compute-in-memory: State space models; ultra-thin AlScN memory; brain-inspired edge AI.
Researchers from the University of Michigan mapped complex state space models directly onto a compute-in-memory architecture in an example of hardware-software co-design for edge AI.
“Compute-in-memory systems offer very high energy efficiency and throughput, but they are rigid and not optimal for convolution and transformer networks. In this study, we showed that they are ideally suited for state space models,” said Wei Lu, professor of engineering at U-M, in a press release. “All operations in a state space model can be efficiently implemented through device physics in a compute-in-memory system, potentially allowing highly efficient hardware implementation of these promising networks.”
The state space model was implemented on a resistive RAM crossbar array fabricated using a standard 65nm CMOS process. The crossbar array is a lattice structure with tungsten oxide memristors at the junctions and was able to perform vector-matrix multiplication just 4.6 bits away from the ideal mathematical output.
“Normally, transferring a complex algorithm from a perfect software environment to real-world compute-in-memory hardware introduces noise and performance degradation,” said Mingtao Hu, a doctoral student of electrical and computer engineering at U-M, in a press release. “However, our architecture not only maintained high accuracy but did so while slashing energy consumption. It proved that state space models and neuromorphic hardware are a naturally perfect match.” [1]
Researchers from the Institute of Science Tokyo and Canon Anelva designed an ultra-thin nonvolatile memory device they hope could be a step towards integrated computing and memory.
At just 30nm thick, the device combines platinum electrodes with a thin film of aluminum scandium nitride. To avoid degradation to the internal crystal structure, a heat treatment was applied to the lower electrode before forming the film, which improved the alignment of the crystals in the film and allowed the device to maintain high performance even at a thickness of just 20nm. The electrodes themselves could be made as thin as 5nm without degrading performance.
“Until now, it was not well understood how thin the entire device could be made,” said Hiroshi Funakubo, a professor in the School of Materials and Chemical Technology at the Institute of Science Tokyo, in a statement. “We carefully tested many conditions, including how to treat the electrodes, and finally demonstrated that high performance can be maintained even at just 30 nanometers. We hope this work will contribute to future computing technologies with dramatically reduced energy consumption.” [2]
Researchers at the University of California San Diego and Rutgers University created a brain-inspired device combining memory and compute where many nodes are physically connected through the same material and can influence one another across the network.
The platform is built from neodymium nickelate, a hydrogen-doped perovskite nickelate. Simulations indicate it is capable of recognizing spoken digits and detecting epileptic seizures early from EEG recordings.
“When hydrogen ions are introduced into the material, they form tiny clouds beneath metal electrodes patterned on its surface. Applying voltage pulses causes the hydrogen ions to move within the material and change its electrical resistance. This motion gives the system memory-like properties. Each node can briefly retain information about recent signals, while separate programmable elements store longer-term information,” explained UC San Diego’s Liezel Labios in a press release.
All the nodes interact through the shared substrate, with activity at one location influencing the behavior of others and creating a collective behavior across the system, which the researchers equate to communication across brain regions. The device analyzes signals both over time and through spatial interactions across the network, consuming only about 0.2 nanojoules per operation. Future work will focus on scaling up the system and integrating it with conventional semiconductor electronics. [3]
[1] X. Zhang, M. Hu, S. Lu, et al. Compute-in-memory implementation of state space models for event sequence processing. Nat Commun 17, 1513 (2026). https://doi.org/10.1038/s41467-025-68227-w
[2] S. Doko, N. Matsui, T. Irisawa, et al. “Thickness Scaling of Integrated Pt/(Al0.9Sc0.1)N/Pt Capacitor Stacks to 30 nm.” Adv. Electron. Mater.12, no. 1 (2026): e00451. https://doi.org/10.1002/aelm.202500451
[3] Y. Zhou, S. Shah, T. Dey, et al. Protonic nickelate device networks for spatiotemporal neuromorphic computing. Nat. Nanotechnol. (2026). https://doi.org/10.1038/s41565-026-02133-0
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