category: Low Power-High Performance

category: IoT, Security & Automotive

Best Practice: RANS Turbulence Modeling In Ansys CFD
By Ansys - 08 Feb, 2023 - Comments: 0

Turbulence modeling is one of the main sources of uncertainty in CFD simulations of technical flows. This is not surprising, as turbulence is the most complex phenomenon in classical physics. Turbulent flows pose a multi-scale problem, where the dimension of the technical device is often of the order of meters (or even 102 meters in case of airplanes and ships), whereas the smallest turbulence ... » read more

Project Centauri: Driving Rapid, Exponential IoT Growth With Arm-Based Microcontrollers
By Arm - 08 Feb, 2023 - Comments: 0

Project Centauri is Arm's microcontroller (MCU) platform software initiative, designed to solve common industry problems, reduce barriers to deployment, and enable scale across the Arm Cortex-M ecosystem. Read this white paper to explore: The components and deliverables of Project Centauri How this initiative addresses the needs of the MCU software ecosystem How to get involved wi... » read more

Where Power Is Spent In HBM
By Ed Sperling - 06 Feb, 2023 - Comments: 0

HBM is gaining ground because of a spike in the amount of data that needs to be processed quickly, but big reductions in power are possible if that processing can be moved closer to the HBM modules, and if more can be done in each compute cycle without sending data back and forth to memory as frequently. Steven Woo, fellow and distinguished engineer at Rambus, talks about what can be done to bo... » read more

Research Bits: Feb. 6
By Jesse Allen - 06 Feb, 2023 - Comments: 0

Pillars for chiplet integration Researchers from the Tokyo Institute of Technology proposed a new chiplet integration technology called Pillar-Suspended Bridge (PSB), which they say is a simpler method of chip-to-chip connection compared to silicon interposers and redistribution layers. In the PSB, only a pillar-shaped metal structure called a "MicroPillar" is interposed at the connection b... » read more

Improving Performance And Power With HBM3
By Andy Patrizio - 30 Jan, 2023 - Comments: 0

HBM3 swings open the door to significantly faster data movement between memory and processors, reducing the power it takes to send and receive signals and boosting the performance of systems where high data throughput is required. But using this memory is expensive and complicated, and that likely will continue to be the case in the short term. High Bandwidth Memory 3 (HBM3) is the most rece... » read more

Week In Review: Design, Low Power
By Susan Rambo - 27 Jan, 2023 - Comments: 0

Electronic system design (ESD) industry revenue is up 8.9% from $3,458.2 million in Q3 2021 to $3,767.4 million in Q3 2022 according to a report from SEMI’s ESD Alliance. Read our in-depth take on what this means. In an attempt to make a viable reusable DNA biosensor probe, NIST researchers used an extremely low-power FETdeveloped at CEA-LETI to remove noise in their DNA biosensor circuitr... » read more

Choosing The Correct High-Bandwidth Memory
By Ann Mutschler - 25 Jan, 2023 - Comments: 0

The number of options for how to build high-performance chips is growing, but the choices for attached memory have barely budged. To achieve maximum performance in automotive, consumer, and hyperscale computing, the choices come down to one or more flavors of DRAM, and the biggest tradeoff is cost versus speed. DRAM remains an essential component in any of these architectures, despite years ... » read more

Research Bits: Jan. 24
By Jesse Allen - 24 Jan, 2023 - Comments: 0

Transistor-free compute-in-memory Researchers from the University of Pennsylvania, Sandia National Laboratories, and Brookhaven National Laboratory propose a transistor-free compute-in-memory (CIM) architecture to overcome memory bottlenecks and reduce power consumption in AI workloads. "Even when used in a compute-in-memory architecture, transistors compromise the access time of data," sai... » read more

Research Bits: Jan. 17
By Jesse Allen - 17 Jan, 2023 - Comments: 0

Ionic circuit for neural nets Researchers at Harvard University and DNA Script developed an ionic circuit comprising hundreds of ionic transistors for neural net computing. While ions in water move slower than electrons in semiconductors, the team noted that the diversity of ionic species with different physical and chemical properties could be harnessed for more diverse information process... » read more

PCIe 6.0 Takes Data Center Performance To The Next Level
By Lou Ternullo - 12 Jan, 2023 - Comments: 0

Looking back at 2022, we saw a major update to the PCI Express (PCIe) specification. PCIe 6.0 brought with it some of the most fundamental changes yet seen by the specification, resulting in some exciting capabilities that are set to take data center performance to the next level in the years ahead. PCIe has been the interconnect of choice in computing for two decades now. Its ongoing advanc... » read more

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