Latency Considerations Of IDE Deployment On CXL Interconnects


Certain applications and hardware types – emerging memory, artificial intelligence/machine learning (AI/ML), and cloud servers, to name a few – can realize significant performance advantages when a low latency interface is employed. However, traditional interconnects like PCI Express (PCIe) often do not offer low enough latencies required to optimize these applications. In response, the Com... » read more

Multi-DRAM Memory Subsystems In SoCs


Even with DRAM capacity going up with each generation of DRAM, the demand for memory densities by a variety of applications is growing at an even faster rate. To support these high memory densities and bus width requirements (that are typically more than what a single DRAM can support), almost all the new generation of memory subsystems and SoCs have multiple DRAM dies combined to effectively c... » read more

Bringing Scalable Power Integrity Analysis To Analog IC Designs


Power integrity is a broad term in integrated circuit (IC) design and verification. However, when IC engineers are working through design signoff, power integrity analysis focuses on three specific aspects of a design: Power: Verify the chip design as implemented provides the total predicted power under different operating modes. Performance: Find and eliminate performance issues affect... » read more

Bringing Intelligent Headlamps To Light via Simulation


Once seen as a basic, utilitarian product feature, today automotive headlamps are becoming much more innovative — and a critical source of competitive differentiation. Intelligent headlamps, which autonomously produce adaptive light beams, are capturing the imagination of the world’s automakers and consumers alike. But how can automotive engineering teams verify the performance of their com... » read more

Introducing mPower


Power integrity analysis evaluates circuits to determine if they will provide their designed/intended performance and reliability as implemented. Designers must be able to verify analog and digital power integrity from the RTL/gate-level through die-level integrations up to the package and board system-level. The mPower toolset is an innovative power integrity verification solution that brings ... » read more

How Semiconductor Solutions Address Safety Requirements Of Future Power Distribution Networks In Autonomous Vehicles


Open up the bonnet of any modern automobile and many of us would be hard-pressed to find anything that we could fix ourselves. With pipes and cables almost artistically integrated into the engine bay, and sleek plastic covers fitted everywhere, there is very little that can still be recognized, yet alone repaired. Perhaps the only location where we feel comfortable is the “fuse box”, or pow... » read more

Execution Dependence Extension (EDE): ISA Support For Eliminating Fences


Fence instructions are a coarse-grained mechanism to enforce the order of instruction execution in an out-of-order pipeline. They are an overkill for cases when only one instruction must wait for the completion of one other instruction. For example, this is the case when performing undo logging in Non-Volatile Memory (NVM) systems: while the update of a variable needs to wait until the correspo... » read more

Power/Performance Bits: Oct. 11


Finer printed circuits Researchers from the National Institute for Materials Science in Japan, Jiangnan University, Zhengzhou University, Senju Metal Industry Co., and C-INK Co. developed a way to print smaller features for printed electronics. The directed self-assembly method increases the chemical polarity of predetermined areas on a surface, which promoted selective adhesion of metallic na... » read more

Power/Performance Bits: Oct. 5


Modeling resistive-switching memory Researchers from Singapore University of Technology and Design (SUTD) and Chang Gung University developed a new toolkit for modeling current in resistive-switching memory devices. The team said that traditional physical-based models need to consider complex behaviors to model current in resistive memory, and there's a risk of permanent device damage due t... » read more

Power/Performance Bits: Sept. 28


Pneumatic memory Engineers at the University of California Riverside developed a pneumatic memory that can be used to control soft robots. Pneumatic soft robots use pressurized air to move soft, rubbery limbs and grippers, making them ideal for delicate tasks as well as safer to be around. However, they still require electronic valves and computers to control and maintain positions. The ... » read more

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