category: Manufacturing, Packaging and Materials

category: IoT, Security & Automotive

BEOL Issues At 10nm And 7nm (Part 1)
By Ed Sperling - 15 Dec, 2016 - Comments: 5

Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for [getentity id="22819" e_name="GlobalFoundries'"] advanced technology development integration unit; Paul Besser, senior technology director at [getentity id="22820" comment="Lam Research"]; David Fried, CTO at [getentity id="22210" e_name... » read more

Software Platforms Bridge The Design/Verification Gap For 5G Communications Design
By David Vye - 15 Dec, 2016 - Comments: 0

The integration of simulation technologies, system prototyping tools, and automated test equipment is critical for addressing the complexity of developing 5G wireless technology. In these cases, design teams will need to rely on a combination of simulation and prototype testing in order to ensure design robustness. Although simulation is essential to design a test bed or prototype, measurement... » read more

40nm Technology Reinvigorated
By Steve Sharp - 15 Dec, 2016 - Comments: 0

When selecting a foundry process for mobile consumer focused products, chip designers are considering the economics of the solution just as much as the technical specifications. Using the latest and greatest finFET process might get you performance headroom above your spec, but could cost significantly more than using a more established, proven process. Today’s 40nm CMOS processes have bee... » read more

Tech Talk: FD-SOI vs. FinFET
By Ed Sperling - 15 Dec, 2016 - Comments: 0

Jamie Schaeffer, 22FDX program director at GlobalFoundries, talks about the future of FD-SOI, what the tradeoffs are in performance, power and cost compared with finFETs, how many mask layers and patterning steps are required for each, and when 12nm FD-SOI will be introduced. Related Stories To 7nm And Beyond GlobalFoundries’ top technologists open up on next-gen FD-SOI, the economi... » read more

BEOL Barricades Ahead
By David Fried - 15 Dec, 2016 - Comments: 0

Coventor recently assembled an expert panel at IEDM 2016, to discuss changes to BEOL process technology that would be needed to continue dimensional scaling to 7 nm and lower. Among the questions posed to panelists: What is BEOL? Where does it begin and end? Are there fundamental limits to interconnect processes? How much longer can we continue to use current interconnect processes and ... » read more

Fab Tool Biz Faces Challenges In 2017
By Mark LaPedus - 15 Dec, 2016 - Comments: 3

After experiencing a gradual recovery and positive growth in 2016, the semiconductor equipment industry sees a mixed picture as well as some uncertainty in 2017. In the near term, though, business is robust. Several chipmakers started to place a sizeable number of fab tool orders in the latter part of 2016, particularly in three areas—3D NAND, logic and foundry. Now, after buying the in... » read more

Highly Sensitive Focus Monitoring Technique Based On Illumination And Target Co-Optimization
By KLA - 14 Dec, 2016 - Comments: 0

By Myungjun Lee, Mark D. Smith, Pradeep Subrahmanyan, and Ady Levy. Abstract We present a cost-effective focus monitoring technique based on the illumination and the target co-optimization. An advanced immersion scanner can provide the freeform illumination that enables the use of any kind of custom source shape by using a programmable array of thousands of individually adjustable micro-mi... » read more

When Exposed To IoT, Big Iron ATE Will Rust
By NI - 14 Dec, 2016 - Comments: 0

When the first “smart” refrigerators were released in the early 2000s, consumers weren’t sure what to do with them. When Nest released the smart thermostat, though, a revolution happened. Humans were taken out of the loop because the thermostat learned on its own about desired temperature and how quickly it could cool or heat a house. And it could synchronize all of this better than a hum... » read more

More Than Just Carbon Dioxide
By Katherine Derbyshire - 14 Dec, 2016 - Comments: 0

As discussed in Part Two of this series, lifecycle analyses of greenhouse gas emissions consider both direct and indirect sources. Indirect CO2 emissions, attributed to electricity and other forms of energy purchased by the fab, are the semiconductor industry’s single largest environmental impact. Of those emissions, a large fraction are attributable to plasma-based etch and deposition steps,... » read more

SRAM Physical Verification With Calibre Pattern Matching
By Mentor, a Siemens Business - 14 Dec, 2016 - Comments: 0

Traditional SRAM verification flows can require significant resources to implement and support, and still miss critical errors that result in manufacturing defects. Using the Calibre Pattern Matching automated pattern-based solution provides accurate results, avoids costly mask re-spins, and is easily updated to add newly developed SRAM IP cells. To read more, click here. » read more

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