High-NA Lithography Starting To Take Shape


The future of semiconductor technology is often viewed through the lenses of photolithography equipment, which continues to offer better resolution for future process nodes despite an almost perpetual barrage of highly challenging technological issues. For years, lithography was viewed as the primary manufacturing-related gating factor to continued device scaling, beset by multiple delays th... » read more

Using ML For Improved Fab Scheduling


Expanding fab capacity is slow and expensive even under ideal circumstances. It has been still more difficult in recent years, as pandemic-related shortages have strained equipment supply chains. When integrated circuit demand rises faster than expansions can fill the gap, fabs try to find “hidden” capacity through improved operations. They hope that more efficient workflows will allow e... » read more

Goals of Going Green


The chip industry is stepping up efforts to be seen as environmentally friendly, driven by growing pressure from customers and government regulations. Some manufacturers have been addressing sustainability challenges for more than a decade, but they are becoming more aggressive in their efforts, while others are joining them. A review of sustainability reports across the semiconductor indust... » read more

A Hybrid PLP Technology Based On A 650mm x 650mm Platform


A panel-level (PL) approach to fan-out (FO) packaging has been discussed for several years to reduce the cost of chip-first FO packaging based on redistribution layer (RDL) technology. More recently, multilayer high-density chip-last packages have been introduced for more advanced applications. This technology would also benefit from PL processing for cost reduction. Due to the large package di... » read more

Improving Gate All Around Transistor Performance Using Virtual Process Window Exploration


As transistor sizes shrink, short channel effects make it more difficult for transistor gates to turn a transistor ON and OFF [1]. One method to overcome this problem is to move away from planar transistor architectures toward 3D devices. Gate-all-around (GAA) architectures are an example of this type of 3D device [2]. In a GAA transistor, the gate oxide surrounds the channel in all directions.... » read more

Multi-Beam Writers Are Driving EUV Mask Development


By Jan Hendrik Peters (bmbg consult) and Ines Stolberg (Vistec Electron Beam) The European Mask and Lithography Conference (EMLC) 2023, held in Dresden this past June, was attended by about 180 people and over 60 talks and posters were presented. With several keynote and invited talks over two and a half days, the conference gave an overview of the semiconductor and technology landscape in E... » read more

Smarter Systems Through Heterogeneous Integration: Highlights From 3D & Systems Summit


It has taken decades of research and development and strong commitment to various industry programs, but the stars are finally aligning for 3D semiconductor systems. No one could have left the 3D & Systems Summit 2023 – held in late June in Dresden – with any doubt that heterogeneous integration, enabled by increasingly mature 3D packaging technologies, is becoming a key driver of the s... » read more

Week In Review: Semiconductor Manufacturing, Test


TSMC is delaying construction on its $40 billion fab in Arizona due to a shortage of U.S. semiconductor workers and higher-than-expected expenses, Bloomberg reported. The Semiconductor Industry Association (SIA) urged the U.S. government to refrain from further restrictions on semiconductor technology to China “until it engages more extensively with industry and experts to assess the impac... » read more

Week In Review: Semiconductor Manufacturing, Test


SEMICON West returned in force this week, with a focus on AI and deep learning  in semiconductor manufacturing, security, heterogenous ICs, and the march toward a $1 trillion chip market. Lam Research President and CEO, Tim Archer, opened with the keynote presentation. Fig. 1: SEMICON West panel: AI’s influence on growth, China-U.S. trade war, and the importance of climate policy were... » read more

Chip Industry Needs More Trust, Not Zero Trust


CISOs from Intel, TSMC, ASML, Applied Materials, and Lam Research unanimously called for the semiconductor industry to pull together to share information and develop cybersecurity protocols as a community at the Securing the Future for Semiconductor Manufacturing forum at SEMICON West. Chief information security officers (CISO) detailed their company’s method for dealing with cybersecurity... » read more

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