The Week In Review: IoT


Analysis Adam Greenfield writes about the privacy and technology issues raised by the Internet of Things in this piece, an adapted extract from his new book, "Radical Technologies: The Design of Everyday Life." “The Internet of Things presents many new possibilities, and it would be foolish to dismiss those possibilities out of hand. But we would also be wise to approach the entire domain wi... » read more

The Week In Review: Design


Tools Mentor added new tools to its high-level synthesis portfolio. The DesignChecks tool helps find bugs during coding with a static mode that performs very fast linting-like checks of the code and a formal mode that uses a formal engine for a more exhaustive proof of issues. The synthesis-aware Coverage tool measures code coverage for C++ signoff and fast closure of synthesized RTL. It sup... » read more

Blog Review: June 7


Cadence's Paul McLellan listens in on Jeff Bier's Embedded Vision Summit keynote, where he argues the cost and power consumption of vision computing will decrease by about 1000X in the next three years. Synopsys' Sean Safarpour points to three reasons formal has grown in the last ten years to become a standard part of the verification toolbox. Mentor's Matthew Balance checks out the abili... » read more

The Week In Review: Manufacturing


Market research IC Insights has released its capital spending forecast by company. In total, there are 15 companies that are forecast to have semiconductor capital expenditures of $1.0 billion or more in 2017, up from 11 in 2016, according to IC Insights. Four companies—Intel, Samsung, GlobalFoundries, and SK Hynix—are expected to represent the bulk of the increase in spending, accord... » read more

The Week In Review: IoT


Analysis The Internet of Trains? That’s how Siemens sees its work in railroads, utilizing Big Data analytics and Internet of Things technology. “Sensors on an Internet of Trains system monitor everything from engine temperature, to the open or closed state of doors, to vibrations on the rails, and even image data from outside of the trains using cameras,” Bernard Marr writes in this anal... » read more

The Week In Review: Design


Tools OneSpin revealed new formal applications focused on random fault verification for safety critical analysis in automotive and other mission-critical applications. The Fault Injection App provides controlled injection of faults and assertion mapping to associated fault scenarios, as well as visibility into corrupted design behavior. The Fault Detection App allows the detection of dangerous... » read more

Blog Review: May 31


Mentor's Michael White predicts that 10nm will come on the scene in a big way this year with a leap to an estimated 9% foundry market share. At the recent RISC-V Workshop, Cadence's Paul McLellan considers whether fully open-source silicon is really viable. Synopsys' Robert Vamosi investigates the security risks posed by the proliferation of connected aftermarket automotive products and a... » read more

The Week In Review: Manufacturing


Chipmakers Samsung has formed a new foundry division and rolled out a range of new processes. Specifically, Samsung plans to develop 8nm, 7nm, 6nm, 5nm and 4nm. It also introduced an 18nm FD-SOI technology. GlobalFoundries has provided more details about its 300mm fab plans in China. The company and the Chengdu municipality have announced an investment to develop an ecosystem for its 22nm ... » read more

The Week In Review: IoT


Analysis Whither Intel’s Internet of Things efforts? “While Intel's IoT business certainly won't solve its ongoing troubles in the PC and data center markets anytime soon, staying invested in that market will ensure that the chipmaker doesn't miss another major technological shift, as it did with mobile devices about a decade ago,” Leo Sun writes in this analysis. Products Cisco Sys... » read more

The Week In Review: Design


Tools Startup Austemper Design unveiled a functional safety tool suite that includes safety analysis that applies default values from industry standards ISO26262 and/or IEC61508 for Failures-in-Time (FIT) rates, tools to handle safety synthesis and augment design structures, and a parallel fault simulator with hybrid simulation capabilities. SystemVerilog and VHDL parsers from Verific serve ... » read more

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