Power-Supply Card Targets High-Voltage PMIC Test


The electronics industry is seeing a move toward higher voltages and currents to deliver sufficient supply and charging power in products ranging from handheld cellphones and tablets to workstations. This trend is evidenced in examples such as the many USB power-delivery (PD) profiles with ratings ranging from 10W (5V at 2A for USB PD 3.0 profile 1) up to 100W (5V at 2A, 12V at 5A, and 20V at 5... » read more

Testing High Power Discrete Devices


Emerging markets are driving the evolution of discrete power devices. Increased power requirements mean more power is being driven through a smaller device, creating challenges in both device design and test. This video series, 3 for 3, provides 3 answers for 3 pressing questions about trends in semiconductor test, and how testing for high power discrete devices is evolving. » read more

Five Smart Ways To Improve EV Battery Production


Batteries and battery management systems are the heart of today's electric vehicles. These components define the performance, safety, and driving range of more than 16.5 million1 electric vehicles currently on the road. As electric vehicle and battery manufacturers continue to look for ways to increase the efficiency and speed of their production processes, many turn to Nordson EFD for prec... » read more

Full Wafer OCD Metrology


Authored by: Daniel Doutt*a, Ping-ju Chena, Bhargava Ravooria, Tuyen K. Trana, Eitan Rothsteinb, Nir Kampelb, Lilach Tamamb, Effi Aboodyb, Avron Gerb, Harindra Vedalac ABSTRACT Optical Critical Dimension (OCD) spectroscopy is a reliable, non-destructive, and high-throughput measurement technique for metrology and process control that is widely used in semiconductor fabrication facilities (f... » read more

MEMS Device Cleaning


Cleaning is an essential process for MEMS applications in order to prevent device failure due to foreign material. Small particles located on MEMS devices are significant causes of device rejection and yield loss. These issues affect inertial devices, such as accelerometers and gyroscopes, as well as microphones, laser bars and other MEMS devices. Click here to download. » read more

The Ever-Increasing Role Of PVT Monitor IP And Its Significance In Silicon Lifecycle Management


The demand for semiconductor chips has grown exponentially over the years, driven by advancements in technologies such as artificial intelligence, the internet of things, 5G, automotive and cloud. With this increased demand, there is a growing need for more reliable semiconductor chips that can operate under extreme conditions and withstand the rigors of modern applications. Here are some of th... » read more

How Metrology Tools Stack Up In 3D NAND Devices


Multiple innovations in semiconductor processing are needed to enable 3D NAND bit density increases of about 30% per year at ever-decreasing cost per bit, all of which will be required to meet the nonvolatile storage needs of the big data era. 3D NAND is the first truly three-dimensional device in production. It is both a technology driver for new metrology methods and a significant part of ... » read more

Pinpointing Timing Delays Can Improve Chip Reliability


Growing pressure to improve IC reliability in safety- and mission-critical applications is fueling demand for custom automated test pattern generation (ATPG) to detect small timing delays, and for chip telemetry circuits that can assess timing margin over a chip's lifetime. Knowing the timing margin in signal paths has become an essential component in that reliability. Timing relationships a... » read more

3D Structures Challenge Wire Bond Inspection


Adding more layers in packages is making it difficult, and sometimes impossible, to inspect wire bonds that are deep within the different layers. Wire bonds may seem like old technology, but it remains the bonding approach of choice for a broad swath of applications. This is particularly evident in automotive, industrial, and many consumer applications, where the majority of chips are not de... » read more

Optimizing Scan Test For Complex ICs


As chips become more heterogeneous with more integrated functionality, testing them presents increasing challenges — particularly for high-speed system-on-chip (SoC) designs with limited test pin availability. In addition, the complexity of emerging packages like 3D and chiplets necessitates comprehensive new solutions that can provide faster results at multiple stages in the silicon lifec... » read more

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