Inspection, Metrology Issues In Advanced Packages

How to ensure that chips and chiplets will work as expected inside a package.


Experts at the Table: Semiconductor Engineering sat down to talk about how to inspect and measure smaller features across large areas in advanced packaging, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; John Hoffman, computer vision engineering manager at Nordson Test & Measurement; and Jiangtao Hu, senior technology director at Onto Innovation. What follows are excerpts of that conversation.

L-R: Nordson's Hoffman; Bruker's Chen; Onto Innovation's Hu.

L-R: Nordson’s Hoffman; Bruker’s Chen; Onto Innovation’s Hu.

SE: How does advanced packaging and heterogeneous design affect metrology and inspection? If you can’t see inside the devices, does that push everything to acoustic and X-ray?

Hoffman: One of the trends we’re seeing as things shrink is the increasing integration of metrology within inspection processes. Traditionally, inspection and metrology were viewed as distinct entities, but as we deal with very high-value components and push the state-of-the-art processes, then we want to move towards 100% inspection. This raises a significant challenge: How do we maintain production speed while inspecting increasingly smaller features? The logical step might be to increase magnification, but this results in a smaller inspection footprint and a longer inspection time. Balancing production speed with the need to inspect minute features is a persistent challenge across all inspection modalities, whether optical, X-ray, or acoustic.

Another trend I’ve noticed is the migration of processes typically associated with the back-end of manufacturing moving toward the mid-end. This includes the integration of advanced packaging techniques earlier in the production process. We’re witnessing the application of conformal coatings directly on wafers, and the placement of extremely small components onto wafers. These practices, which were once confined to the packaging phase, are now becoming more prevalent. This shift introduces a variety of new materials into the production process, particularly impacting optical inspection. Adapting to these diverse material types presents a significant and growing challenge for the industry.

Hu: In advanced packaging, the trend has shifted significantly. The first trend is dimensionality. Initially, in advanced packaging, structure dimensions are relatively large in both vertical and lateral directions, placing them in the macroscopic domain. Now, the advanced 3D packaging and hybrid bonding processes are moving toward front-end processes. The goal is to achieve interconnects between chips at a local level, which results in progressively smaller dimensions. This presents a challenge as the lateral resolution approaches the sub-micron scale, while the vertical remains relatively large. Many traditional packaging metrology and inspection technologies are not designed to work on sub-micron features. Front-end metrology, on the other hand, is designed for smaller dimensions and frequently has difficulty dealing with large vertical dimensions.

Another critical aspect brought up is the buried structure observed in advanced packaging, particularly between wafers or beneath metals and dielectrics. It’s essential to have the capability to examine these structures. Some methods might utilize optical technologies, including extended infrared techniques. Additionally, there’s a need for technologies that can handle opaque materials using X-ray or acoustic methods. We are exploring advancements in acoustic technology for detecting voids and other anomalies, regardless of their general dimensions.

Lastly, since advanced packaging is often at the latter stages of the manufacturing process, each device becomes increasingly expensive. There’s a necessity for comprehensive wafer inspection to ensure no defects, particularly as lateral dimensions become more refined and challenging to inspect with traditional methods. This situation calls for a combination of inspection and metrology. The key discussion in metrology inspection is how to provide accurate metrology solutions while still achieving full wafer coverage.

Chen: Besides just looking at the different technology types like optical, X-ray, and acoustic, we should see if there needs to be innovations within a technology type. We’ve looked at X-ray inspection and metrology and discussed whether we want to adopt a different technique to solve those problems. We not only want the high resolution, but also the high throughput that’s relevant for the packaging. Many companies have the same X-ray tool architecture, so how about reinventing that using completely different X-ray sources or detectors? There are tradeoffs that you make, but maybe that’s the right tradeoff to be applicable for the advanced packaging trends.

SE: Are you seeing more insertion points in the manufacturing flow for metrology and inspection before you get to the packaging? How do we make sure we have known good die before you get there?

Hoffman: Whenever a new process is introduced, there’s always an interest in measuring or inspecting it and its intermediate process steps. For instance, to create bumps on a wafer, you’re looking at around 30 individual steps to form the copper pillars on the wafer. Initially, I assumed that the focus would be on inspecting the final product — the completed pillars on the wafer. But no, it turns out that many customers want to ensure that each of these individual processes is functioning correctly, in some cases aiming for 100% inspection. This was quite an eye-opener for me. I hadn’t anticipated that level of detailed inspection. Our products are sufficiently flexible to enable these kinds of intermediate process inspections.

Chen: That’s a good problem to have if they already know they need 100% inspection. Others want to minimize sampling as much as possible and rely heavily on final electrical test, but they may not be assessing the risks that they’re taking with that low sampling rate. I do see some creative ways of using different technology types. An example is metrology in HBM stacks, which is a hot topic today since AI increasingly demands more HBM. Typically, optical or X-ray is used to monitor the die alignment of the HBM stack. But recently, there’s been exploration of acoustic methods to qualitatively assess whether the alignment is within specifications or not. So, people are exploring all available options.

Hu: A prime example of the trend of using back-end processes for the front-end is the increasing adoption of hybrid bonding for the 3D NAND process, where people make cell storage units and control logic units on different wafers, then bring them together. This is a clear utilization of advanced packaging technology in front-end processes. Another emerging trend is the integration of backside power delivery systems in logic devices. Here, the power interconnects are produced on a separate wafer and then bonded to the logic circuit at the backside using the hybrid bonding process.

However, there’s also a reverse trend. As dimensions become finer and the lines between packaging and FEOL blur over time, some advanced packaging techniques like direct bonding are utilizing back-end-of-line processes traditionally reserved for device manufacturing. In the past, there was a perception that 3D packaging processes were perhaps a generation behind in terms of technology and cost. But now, we’re seeing a push for the more advanced processes to be integrated into 3D packaging due to the demanding dimensional requirements. For instance, one of our tools, initially developed for high-aspect ratio 3D NAND metrology, is now being adopted for measuring properties of micro-TSVs in the two- to three-micron CD range.

This often calls for innovation, as the technology doesn’t always directly apply. For example, the acoustic technology used for device fabrication differs significantly from that used in advanced packaging. In front-end processes, we mostly deal with opaque materials’ thickness, but in advanced packaging, there’s a variety of materials and different applications. There’s a growing emphasis on examining buried structures within the chip and detecting voids between metals. Therefore, even though we’re using existing technology, there’s a need to specifically develop and innovate to meet the advanced packaging requirements. It’s an exciting and evolving field.

SE: One of the big challenges today is the thousands of bumps required to put multiple dies together. Is there a need to inspect every connection?

Chen: It depends on the customer and the specific issues they’re facing. They want to break down and understand the root causes of these issues. Is it a contamination problem, like particles? In that case, you need to rely more on 100% screening. Or is it more of a process issue, such as die placement, warpage, or tilt? These are parameters you can manage with process control, and perhaps you can reduce the number of measurement points needed. I do think the majority of these issues are related to process control. That’s an area where you can take more corrective actions and significantly improve quality. Being able to monitor and provide process control feedback across the entire wafer at very high throughput is crucial. Traditionally this would be done with a sampling plan, using a failure analysis tool that would prolong turnaround time and reduce the amount of data they have to work with.

Hu: That’s a classic problem. The challenge really lies in the fact that the number of bonds has increased by several orders of magnitude. And as the dimensions get smaller, the concerns become more intricate. How do you simultaneously improve the speed and accuracy, while also handling tens of gigabytes of data per wafer? Of course, people have different ways to handle this. You can offload the data to a central server for processing, or you can integrate analysis capabilities with some sort of edge computing. So the data management becomes decentralized in some cases, but it’s still crucial to disseminate the critical information.

Hoffman: Frank brought up a really good point — every customer has their own unique process issues they’re trying to resolve. Your system, including the sensor and the tool, needs to have enough flexibility to handle all kinds of failure modes. If you’re facing uniformity issues across your wafer, your approach might differ significantly from when you’re dealing with control issues for each individual pillar. You need a flexible system to adapt to these scenarios.

Then there’s the challenge of dealing with data rates. If you’re capturing three-micron optical images of an entire wafer, you’re going to accumulate terabytes, even petabytes, of storage very quickly. So it’s crucial to perform as much data reduction as possible. The goal is to distill the data down to what we call summary measures for each of these individually visual features of interest to the customer. The aim is to work with the customer to reduce the data to the critical summary measures that are essential for their process.

Related Reading
Closing The Test And Metrology Gap In 3D-IC Packages
Finding defects in stacked die is a daunting challenge. Equipment, processes, and methodologies all need modifications, and that’s just for starters.

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