category: Test, Measurement and Analytics

category: IoT, Security & Automotive

Optimizing Tester Memory Resources With Pooling Technology
By Ronald Goerke - 08 Apr, 2025 - Comments: 0

The rapid evolution of semiconductor devices has amplified the demand for advanced automated test equipment (ATE) that can handle increasingly complex test scenarios for logic devices. ATE vector memory is becoming an increasingly valuable commodity as scan-pattern volume soars. Extrapolations based on data from the International Technology Roadmap for Semiconductors (ITRS) indicate that scan d... » read more

Hunting For Macro Defects
By Anne Meixner - 08 Apr, 2025 - Comments: 0

Detecting macro-defects early in the wafer processing flow is vital for yield and process improvement, and it is driving innovations in both inspection techniques and wafer test map analysis. At the wafer level, a macro-defect can affect more than one die, and in some cases large regions of a wafer. Finding macro defects can indicate a significant issue with a process module, a particular fi... » read more

A Universal Deep Learning Model For Segmenting Automated Optical Inspection Images
By Nordson Test And Inspection - 08 Apr, 2025 - Comments: 0

A new technical paper titled "A Universal AI-Powered Segmentation Model for PCBA and Semiconductor" was published by researchers at Nordson Corporation. "This paper introduces a novel universal deep learning model designed to segment AOI images for both PCBA and 17 semiconductor components, offering a more robust and adaptable solution for defect detection," states the paper. Read more he... » read more

Need For KGD Drives Singulated Die Screening
By Anne Meixner - 31 Mar, 2025 - Comments: 0

The move to multi-die packaging is driving chipmakers to develop more cost-effective ways to ensure only known-good die are integrated into packages, because the price of failure is significantly higher than with a single die. Better methods for inspecting and testing these devices are already starting to roll out. High-throughput infrared inspection is capable of catching more sub-surface d... » read more

Chip Failures: Prevention And Responses Over Time
By Ed Sperling - 19 Mar, 2025 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the causes of chip failures, how to respond to them, and how that can change over time, with Steve Pateras, vice president of marketing and business development at Synopsys; Noam Brousard, vice president of solutions engineering at proteanTecs; Harry Foster, chief verification scientist at Siemens EDA; and Jerome Toublanc, hi... » read more

Accelerating Digital Transformation With Tight Integration Of Manufacturing Data
By Jonathan Holt - 17 Mar, 2025 - Comments: 0

Many semiconductor companies are involved in digital transformation of their overall processes and operations. Manufacturing is one of the most critical and value generating processes in a semiconductor company. Being able to tightly integrate manufacturing with the rest of the enterprise is a critical element of a successful digital transformation program. Recognizing the value of real-time... » read more

What’s Changing In Outlier Detection
By Ed Sperling - 12 Mar, 2025 - Comments: 0

Commonly used outlier detection approaches, such as parts average testing or determining whether a die is good based upon other dies in the immediate neighborhood, are falling short in advanced packages and SoCs. Some devices may pass tests and still fail in the field. In the past, this was solved by adding margin into designs, but that margin now takes too big a bite out of performance and pow... » read more

Measuring Multi-Layer Ultra-Thin Critical Films
By Jiangtao Hu - 11 Mar, 2025 - Comments: 0

Artificial intelligence is one of the driving forces in today’s semiconductor industry, with more traditional market drivers like high performance compute and smart phones continuing to play important roles. This situation is unlikely change in the years ahead as chip makers continue their quest to create the most advanced nodes. With 3nm nodes in production and 2nm nodes on the horizon, the ... » read more

Speeding Down Memory Lane With Custom HBM
By Faisal Goriawalla - 11 Mar, 2025 - Comments: 0

With the goal of increasing system performance per watt, the semiconductor industry is always seeking innovative solutions that go beyond the usual approaches of increasing memory capacity and data rates. Over the last decade, the High Bandwidth Memory (HBM) protocol has proven to be a popular choice for data center and high-performance computing (HPC) applications. Even more benefit can be rea... » read more

Automation And AI Improve Failure Analysis
By Laura Peters - 11 Mar, 2025 - Comments: 0

When a chip malfunctions it’s the job of the failure analysis engineer to determine how it failed or significantly deviated from its key performance metrics. The cost of failure in the field can be huge in terms of downtime, recalls, damage to a company’s reputation, and more. For these reasons, chipmakers take customer returns very seriously, focusing resources to quickly get to the bot... » read more

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