Software-Driven Verification (Part 3)

By Brian Bailey - 10 Feb, 2015 - Comments: 0

[getkc id="10" comment="Functional Verification"] has been powered by tools that require hardware to look like the kinds of systems that were being designed two decades ago. Those limitations are putting chips at risk and a new approach to the problem is long overdue. Semiconductor Engineering sat down with Frank Schirrmeister, group director, product marketing for System Development Suite at [... » read more

Signal Integrity Issues

By Ed Sperling - 04 Feb, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss signal integrity with Rob Aitken, research fellow at [getentity id="22186" comment="ARM"]; PV Srinivas, senior director of engineering for the Place & Route Division of [getentity id="22017" e_name="Mentor Graphics"]; and Bernard Murphy, chief technology officer at [getentity id="22026" e_name="Atrenta"]. What follows are excerpts of that conver... » read more

Signal Integrity Issues

By Ed Sperling - 21 Jan, 2015 - Comments: 0

Signal Integrity Issues

By Ed Sperling - 15 Jan, 2015 - Comments: 0

Productivity And The IoT

By Ann Mutschler - 14 Jan, 2015 - Comments: 0

The market for devices that connect almost everything to the [getkc id="76" comment="Internet of Things"] is projected to explode, creating opportunities for companies that haven’t been traditional chip developers to decide to start developing devices. Semiconductor Engineering sat down to discuss this topic with Jack Guedj, corporate VP of [getentity id="22342" comment="Tensilica"] products ... » read more

Security Risks Grow Worse

By Ed Sperling - 12 Jan, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss security issues for connected devices with Marc Canel, vice president of security at [getentity id="22186" comment="ARM"]; Paul Kocher, president and chief scientist for the Cryptography Research division of [getentity id="22671" e_name="Rambus"]; Michael Poitner, global segment marketing manager at [getentity id="22499" e_name="NXP"]; Felix Baum, h... » read more

Software-Driven Verification (Part 2)

By Brian Bailey - 05 Jan, 2015 - Comments: 0

Security Risks Grow Worse

By Ed Sperling - 30 Dec, 2014 - Comments: 0

Hybrid Verification: The Only Way Forward

By Brian Bailey - 29 Dec, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="10" kc_name=" functional verification"]. The inability of RTL [getkc id="11" kc_name="simulation"] to keep up with verification needs is causing rapid change in the industry. Taking part in the discussion are Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Janick Bergeron, fe... » read more

Is The Stacked Die Ecosystem Stagnating?

By Ann Mutschler - 18 Dec, 2014 - Comments: 2

It is now widely agreed that not much has been happening in terms of adoption for 2.5D interposer and 3D ICs. “It seems like everyone is still at the starting line waiting for the race to begin," said Javier DeLaCruz, senior director of engineering of [getentity id="22242" e_name="eSilicon"]. "Interposer assembly and IP availability for effectively using the [getkc id="82" comment="2.5D IC... » read more

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category: Round Tables

category: IoT, Security & Automotive

Software-Driven Verification (Part 3)

Signal Integrity Issues

Signal Integrity Issues

Signal Integrity Issues

Productivity And The IoT

Security Risks Grow Worse

Software-Driven Verification (Part 2)

Security Risks Grow Worse

Hybrid Verification: The Only Way Forward

Is The Stacked Die Ecosystem Stagnating?