category: IoT and Security

category: Auto, Security & Edge AI

Cadence Reality Digital Twin Platform and NVIDIA Omniverse Integration
By Cadence - 01 Jul, 2026 - Comments: 0

The rapid expansion of AI infrastructure requires a paradigm shift in how data centers are designed, built, and operated. Traditional workflows are often fragmented, relying on isolated tools that obscure the full operational context required for high-performance computing (HPC) environments. The Cadence Reality Digital Twin Platform addresses these challenges by integrating physics-... » read more

Connectivity and Compute in Next-Generation Edge Devices
By Synaptics - 01 Jul, 2026 - Comments: 0

AI-native edge devices are changing IoT by combining AI, connectivity, and compute on a single platform. This white paper explains how Synaptics SYN765x integrates Wi-Fi 7, local AI processing, and intelligent sensing to reduce latency, cut costs, improve privacy, and speed development of next-generation connected devices. Read more here. » read more

Re-Engineering Engineering for Automotive with Electronics Digital Twins for the SDV Era
By Synopsys - 01 Jul, 2026 - Comments: 0

As vehicles become software-defined, traditional development approaches can’t keep pace with growing complexity, shorter innovation cycles, and rising validation demands. By leveraging the Synopsys eDT Platform for Automotive, companies can accelerate software bring-up, enhance collaboration, reduce prototyping costs, and ensure higher safety and reliability across the vehicle lifecycle. ... » read more

Build Your Device Security Test Lab
By Keysight - 01 Jul, 2026 - Comments: 0

Embedded systems are becoming more powerful, more connected, and more exposed. At the same time, attacks on hardware evolve rapidly,  expanding beyond software exploits into physical techniques such as side‑channel analysis (SCA) and fault injection (FI). Fixing hardware weaknesses late in development is costly and often impractical, and in some cases impossible once devic... » read more

A Massively Parallel GPU Rasterizer for Next-generation Computational Lithography
By Siemens EDA - 01 Jul, 2026 - Comments: 0

Computational lithography, critical for advanced semiconductor manufacturing, demands high-performance rasterization to meet nanometer-scale precision. Traditional CPU-based rasterizers struggle with the increasing complexity and data volumes of modern designs. This paper presents a massively parallel GPU rasterizer designed to accelerate high-resolution mask synthesis, lithography simulation, ... » read more

Solid-State Circuit Breakers From A System Perspective
By Infineon - 01 Jul, 2026 - Comments: 0

Explore SSCBs from a holistic system perspective and understand how they transform system architecture, protection concepts and overall performance. This presentation highlights their role in modern power distribution, showing how they enable smarter control, faster protection and improved efficiency across applications. Ideal for engineers evaluating next-generation power systems. Read more... » read more

HyperLane: GPU Virtualization with Imagination
By Imagination Technologies - 01 Jul, 2026 - Comments: 0

GPU virtualization allows multiple operating systems to share a single GPU, each submitting their tasks independently and free from interference. It is a feature that is increasingly in demand in automotive, data center and consumer devices as higher performance platforms are being asked to handle more workloads simultaneously. This fifteen-page white paper introduces the concept of GPU virt... » read more

Wi-Fi Flies Higher As Edge AI Build-Out Takes Root
By Ed Sperling - 15 Jun, 2026 - Comments: 0

Key Takeaways: Wi-Fi 7 is becoming an essential technology for edge AI, and subequent demands for even better reliability will grow as the edge build-out takes shape. Edge computing is based on the assumption that more data will be processed and stored locally, which will help reduce data leakage and theft. The big challenge ahead will be orchestrating data movement across different ... » read more

Reduce Memory Redesigns With Shift-Left
By Chun-hsiang Chang - 05 Jun, 2026 - Comments: 0

Engineering managers overseeing memory design know the pattern well: a promising architecture moves smoothly through schematic capture and into layout, only to stumble when integration testing reveals contention issues that force expensive redesigns. Address decoders that looked correct in isolation turn out to enable multiple banks simultaneously. Power switches configured for aggressive gatin... » read more

A Comprehensive Approach To 3D-IC Physical Verification
By Siemens EDA - 05 Jun, 2026 - Comments: 0

3D integrated circuits (3D ICs) are reshaping semiconductor development. While these architectures deliver significant performance, power and integration gains, they introduce new challenges in verification—across electrical, thermal and mechanical domains. Siemens Calibre offers a comprehensive platform for 3D IC physical verification, linking DRC, LVS, advanced thermal simulation, mechanica... » read more

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