category: System-Level Design

category: IoT, Security & Automotive

Blog Review: Dec. 8
By Jesse Allen - 08 Dec, 2021 - Comments: 0

Arm's Shidhartha Das introduces a method to achieve fast yet accurate power modelling for both design and runtime power introspection within the same unified framework using machine learning and data science approaches. Synopsys' Mike Borza warns that the semiconductor industry is facing a flood of counterfeit chips and why being aware of different types of semiconductor scams and tackling t... » read more

Week In Review: Design, Low Power
By Jesse Allen - 03 Dec, 2021 - Comments: 0

Infineon Technologies acquired Syntronixs Asia, which specializes in precision electroplating, a key process in the assembly process of semiconductors. Syntronixs Asia has a workforce of more than 500 people and has been a major service provider for Infineon since 2009. “Through this acquisition, we have made another important step to strengthen the resilience of our supply chain,” said Tho... » read more

Blog Review: Dec. 1
By Jesse Allen - 01 Dec, 2021 - Comments: 0

Synopsys' Mike Gianfagna points to three events that created a fundamental shift in product development that has enabled rapid introduction of a wide range of new products. Siemens' Sagi Reuven considers some key challenges facing the supply chain and the impact on electronics manufacturers, from rising shipping costs to shortages of raw materials and transportation labor. Cadence's Frank... » read more

Missing Interposer Abstractions And Standards
By Brian Bailey - 29 Nov, 2021 - Comments: 0

The design and analysis of an SoC based on an interposer is not for the faint of heart today, but the industry is aware of the challenges and is attempting to solve them. Until that happens, however, it will be a technique that only large companies can deploy because they need to treat everything almost as if it were a single die. The construction of large systems uses techniques, such as ab... » read more

Blog Review: Nov. 24
By Jesse Allen - 24 Nov, 2021 - Comments: 0

Cadence's Paul McLellan introduces the theory and practice of datapath formal verification and explores two use cases of dot-product accumulate systolic design and hashing design. Siemens EDA's Rich Edelman shows that constructing an in-order UVM scoreboard doesn't have to be a difficult or complex task, and certainly simpler than replacing a laptop's keyboard. Synopsys' Gordon Cooper con... » read more

Product Lifecycle Management For Semiconductors
By Brian Bailey - 23 Nov, 2021 - Comments: 1

Product lifecycle management (PLM) and the semiconductor industry have always been separate, but pressure is growing to integrate them. Automotive, IIoT, medical, and other industries see that as the only way to manage many aspects of their business, and as it stands, semiconductors are a large black box in that methodology. The technology space is driven by a mix of top down and bottom-up p... » read more

Structural Vs. Functional
By Brian Bailey - 23 Nov, 2021 - Comments: 0

When working on an article about PLM and semiconductors, I got to review a favorite topic from my days in EDA development – verification versus validation. I built extensive presentations around it and tried to persuade people within the EDA industry, as well as customers, about the advantages of doing a top-down functional modeling and analysis. The V diagram that everyone uses is flawed and... » read more

Advanced Packaging Shifts Design Focus To System Level
By Ann Mutschler - 23 Nov, 2021 - Comments: 0

Growing momentum for advanced packaging is shifting design from a die-centric focus toward integrated systems with multiple die, but it's also straining some EDA tools and methodologies and creating gaps in areas where none existed. These changes are causing churn in unexpected areas. For some chip companies, this has resulted in a slowdown in hiring of ASIC designers and an uptick in new jo... » read more

Gaps In The AI Debug Process
By Brian Bailey - 23 Nov, 2021 - Comments: 0

When an AI algorithm is deployed in the field and gives an unexpected result, it's often not clear whether that result is correct. So what happened? Was it wrong? And if so, what caused the error? These are often not simple questions to answer. Moreover, as with all verification problems, the only way to get to the root cause is to break the problem down into manageable pieces. The semico... » read more

Towards Decarbonization: Keeping Electronics Energy Consumption In Check
By Frank Schirrmeister - 23 Nov, 2021 - Comments: 0

The International Technology Roadmap for Semiconductors (ITRS) roadmap famously said in 2001 that "cost of design is the greatest threat to the continuation of the semiconductor roadmap." For years, the industry followed the ITRS updates on productivity improvements provided by automating design and hardware to counteract the looming design cost. The discussion on decarbonization has some simil... » read more

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