category: System-Level Design

category: IoT, Security & Automotive

Blog Review: Sept. 22
By Jesse Allen - 22 Sep, 2021 - Comments: 0

Ansys' Tyler Ferris describes some of the many ways electronics on a PCB assembly can fail, from component level failures like wirebond breaking and liftoff to board-level failures such as conductive anodic filament failure. Cadence's Paul McLellan considers the switch from low-speed parallel interfaces to high-speed serial interfaces as one of the key advancements making modern data centers... » read more

Thermal And Stress Analysis Of 3D-ICs With Celsius Thermal Solver
By Cadence - 22 Sep, 2021 - Comments: 0

As electronics get smaller and faster, the environment for thermal issues is becoming more and more challenging. These problems are widespread and can appear in the chip, the board, the package, and the entire system. This white paper helps designers understand the cross-fabric thermal and stress challenges introduced by 3D-ICs and how the Cadence Celsius  Thermal Solver helps designers analyz... » read more

RISC-V Processor Verification: Case Study
By Imperas - 22 Sep, 2021 - Comments: 0

Abstract: The open RISC-V instruction set architecture is gaining traction with both semiconductor vendors and systems companies. A key question is how to verify the RISC-V processor implementation, especially when developing the RTL and/or adding custom instructions? This paper reports on the techniques used and lessons learned for the verification of a RV64IMACBNSU RISC-V processor by an exp... » read more

Faster Analog Design Closure With Early Parasitic Analysis Flow – Part 1
By Synopsys - 22 Sep, 2021 - Comments: 0

In part 1 of this series, Denis Goinard, Director of Engineering at Synopsys, discusses how Synopsys provides a unified workflow to accurately estimate, measure, extract and simulate parasitics by bringing signoff tools into the design process, enabling faster design convergence. Click here to play the video. Note: This is a Synopsys 'video white paper.' For more video white papers, click h... » read more

Week In Review: Design, Low Power
By Jesse Allen - 17 Sep, 2021 - Comments: 0

MoSys, a provider of SRAM solutions and networking accelerators, and Peraso Technologies, a provider of 5G mmWave devices, are merging. Stockholders of Peraso are expected to hold a 61% equity interest in the combined company, with the remaining 39% equity interest to be retained by the stockholders of MoSys. Peraso CEO Ronald Glibbery said, "By joining with MoSys, we believe we can deliver a b... » read more

Blog Review: Sept. 15
By Jesse Allen - 15 Sep, 2021 - Comments: 0

Synopsys' Ian Land and Ricardo Borges examine how radiation modeling can help ensure semiconductor components will survive while housed in equipment that is orbiting our planet or traveling through deep space over extensive periods of time. Siemens EDA's Rich Edelman explores why writing coverage is an art requiring imagination, practice, and patience, along with some tips on how to improve.... » read more

Week In Review: Design, Low Power
By Jesse Allen - 10 Sep, 2021 - Comments: 0

Tools & IP Cadence and Samsung Foundry are offering Mixed-Signal OpenAccess-ready process design kit (PDK) technology files that support a range of Samsung process technologies from 28FDS to GAA base 3nm. Enabling access to mixed-signal designs in a common OpenAccess database, the co-design methodology promotes shared responsibilities and collaboration between the analog and digital teams ... » read more

Blog Review: Sept. 8
By Jesse Allen - 08 Sep, 2021 - Comments: 0

Synopsys' Scott Durrant considers the IP used in HPC SoCs and the efforts to simultaneously minimize data movement and maximize the speed at which data is transferred from one location to another, whether that data transfer is across long distances or from one chip to another within a server. Cadence's Paul McLellan looks into a new version of the Rowhammer DRAM vulnerability that can allow ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 03 Sep, 2021 - Comments: 0

Synaptics will acquire DSP Group, a provider of voice and wireless chipset solutions for converged communications, at $22.00 per share in an all-cash transaction. The deal is worth $538 million. "We continue to invest in technologies that tilt our product mix toward IoT applications," said Michael Hurlston, President and CEO of Synaptics. "DSP Group's expertise in SmartVoice and ULE wireless so... » read more

58th DAC Online Program Is Now Live
By Michelle Clancy Fuller - 31 Aug, 2021 - Comments: 0

We did it. After more than a year’s worth of hard work the DAC Executive Committee finally released the 58th DAC program, despite a mountain of challenges and hurdles we encountered along the way this past year. We started planning the 58th DAC a little over a year ago, and we were confronted with a lot of uncertainty on what to expect for the coming year. Would submissions be down? Would ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy