category: System-Level Design

category: IoT, Security & Automotive

Blog Review: Aug. 26
By Jesse Allen - 26 Aug, 2020 - Comments: 0

Cadence's Paul McLellan shares some highlights from Hot Chips, including the massive growth in deep learning models, the basics of designing neural network models, and challenges involved in different approaches. Mentor's Colin Walls explores memory management units, its job of translating an address used by the CPU to an alternative address, and why this remapping is desirable and useful. ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 Aug, 2020 - Comments: 0

Tools & IP SiFive announced OpenFive, a self-contained and autonomous business unit that will offer custom silicon solutions with differentiated IP. OpenFive will be led by Dr. Shafy Eltoukhy, SVP, and general manager of OpenFive. OpenFive debuted with a new Die-to-Die (D2D) interface IP portfolio to serve next-generation chipset based designs for networking, HPC, and AI markets. The D2D p... » read more

Blog Review: Aug. 19
By Jesse Allen - 19 Aug, 2020 - Comments: 0

Rambus' Scott Best digs into some of the most sophisticated attacks used to target and compromise security chips, such as laser voltage probing, focused ion beam editing, reverse engineering, and NVM extraction, and ways to counter them. Synopsys' Chris Clark proposes a way to identify problems earlier and better ensure safety and reliability in automotive SoCs by moving from a linear develo... » read more

Week In Review: Design, Low Power
By Jesse Allen - 14 Aug, 2020 - Comments: 0

Cadence added new machine learning functionality to its Xcelium Logic Simulator to speed verification closure on randomized regressions. Xcelium ML directly interfaces to the simulation kernel and learns iteratively over an entire simulation regression, guiding the Xcelium randomization kernel on subsequent regression runs to achieve matching coverage with reduced simulation cycles. Kioxia adop... » read more

Blog Review: Aug. 12
By Jesse Allen - 12 Aug, 2020 - Comments: 0

Arm's Greg Yeric takes a look at what semiconductor manufacturing might look like in 2030 as the price of equipment rises and possibilities for when the next upgrade to EUV, high numerical aperture, eventually runs out of steam. Synopsys' Taylor Armerding explains the difference between bugs and security flaws and why it's so important to pay attention to potential problems in a design's spe... » read more

Week In Review: Design, Low Power
By Jesse Allen - 07 Aug, 2020 - Comments: 0

M&A Goodix acquired Dream Chip Technologies. Shenzhen-based Goodix is known for fingerprint and other biometric sensors and authentication solutions, as well as Arm and RISC-V based MCUs. It is reportedly among the ten largest Chinese chipmakers, according to EqualOcean. Terms of the deal were not disclosed. Based in Garbsen, Germany, Dream Chip Technologies originally was founded in ... » read more

Blog Review: Aug. 5
By Jesse Allen - 05 Aug, 2020 - Comments: 0

Rambus' Scott Best explains some more sophisticated chip attacks, such as side-channel attacks, clocking attacks, fault injection, and infrared emission analysis, and countermeasures that can be adopted against them. Arm's Mark O'Connor considers ways that deployed neural networks could adapt to examples it sees in real-world use and generate more accurate predictions. Mentor's Chris Spea... » read more

Problems And Solutions In Analog Design
By Ann Mutschler - 05 Aug, 2020 - Comments: 1

Advanced chip design is becoming a great equalizer for analog and digital at each new node. Analog IP has more digital circuitry, and digital designs are more susceptible to kinds of noise and signal disruption that have plagued analog designs for years. This is making the design, test and packaging of SoCs much more complicated. Analog components cause the most chip production test failures... » read more

Creating Better Models For Software And Hardware Verification
By Ed Sperling - 04 Aug, 2020 - Comments: 1

Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; Nasr Ullah, senior director of performance architecture at SiFive. What follows are excerpt... » read more

Rethinking Competitive One Upmanship Among Foundries
By Ed Sperling - 03 Aug, 2020 - Comments: 2

The winner in the foundry business used to be determined by who got to the most advanced process node first. For the most part that benchmark no longer works. Unlike in the past, when all of the foundries and IDMs competed using basically the same process, each foundry has gone its own route. This is primarily due to the divergence of end markets, and the realization that as costs increase, ... » read more

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