Blog Review: May 26


Cadence's Paul McLellan checks out challenges in designing processors for AI applications, the explosion in the number of weights used to language processing, and the current state of training and inference hardware. Synopsys' Mike Gianfagna explores how hyper-convergent design will push device capabilities through integration of multiple technologies, multiple protocols, and multiple archit... » read more

Virtuoso ADE Assembler


Cadence Virtuoso ADE Assembler is an advanced design and simulation environment that extends the capabilities of Virtuoso ADE Explorer, adding all the tests needed to fully verify a design over all operational, process, and environmental conditions. As more analysis is required, users can take incremental advantage of the Virtuoso Variation Option to do more advanced statistical analysis on the... » read more

Hardware-Software Co-verification (ARM CPU)


In every complex SoC verification process, it is necessary to activate the CPUs during verification and to check the operation of the software they execute alongside the test’s scenarios. At a minimum, basic scenarios such as “boot rom execution” are tested, but in many cases, further scenarios are required. The CPUs themselves are usually proven IPs, but in order to verify their integrat... » read more

Next-Gen SerDes Roadmap


An explosion in data is causing a series of successive bottlenecks in the data center. Priyank Shukla, product marketing manager for high-speed SerDes IP at Synopsys, digs into the performance roadmap for moving data within server racks and between different racks, where the bottlenecks are today, and how they will be addressed in the future. Related SerDes Knowledge Center Top stories... » read more

Week In Review: Design, Low Power


Siemens will acquire Supplyframe, a supply chain intelligence, sourcing, and marketplace platform for the electronics industry, for $700 million. The company operates on a software-as-a-service model and will serve as the nucleus of Siemens’ digital marketplace strategy, according to Cedrik Neike, member of the Managing Board of Siemens AG. “Supplyframe’s ecosystem and marketplace intelli... » read more

Blog Review: May 19


Cadence's Paul McLellan checks out a project from Intel and DARPA to combine the eASIC structured ASIC technology with data interface chiplets and enhanced security protection, with manufacturing in the U.S. In a podcast, Siemens EDA's Ellie Burns and Michael Fingeroff discuss the gap between what the best AI applications can perform today versus the human brain and the challenges that hardw... » read more

Week In Review: Design, Low Power


Siemens Digital Industries Software acquired Fractal Technologies, a provider of tools for IP validation and comparison checks of standard cell libraries, IO, and hard IP that reports mismatches or modeling errors, as well as comparing new IP releases close to tape-out. Siemens plans to add Fractal’s technology to the Xcelerator portfolio, joining the Solido software product family, which inc... » read more

Blog Review: May 12


Cadence's Claire Ying points to major changes in PCIe 6.0 as PAM4 signaling replaces NRZ to help double bandwidth, Forward Error Correction helps maintain data integrity, and various improvements are made to power consumption. Synopsys' Samantha Beaumont argues that automotive sensors are a major potential attack point and addresses some of the key areas of sensor vulnerability and the chall... » read more

Standards, Open Source, and Tools


Experts at the Table: Semiconductor Engineering discussed what open source verification means today and what it should evolve into with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardware engineer... » read more

Week In Review: Design, Low Power


Synopsys completed its acquisition of MorethanIP, a provider of Ethernet Digital Controller IP supporting data rates from 10G to 800G. The acquisition adds MAC (Medium Access Controller) and PCS (Physical Coding Sublayer) for 200G/400G and 800G Ethernet to Synopsys’ portfolio. The company also provides Time-Sensitive Networking, Fibre Channel, and Ethernet Switching IP for integration into AS... » read more

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