category: System-Level Design

category: Auto, Security & Edge AI

AI Testing: Pushing Beyond DFT Architectures
By Rahul Singhal - 27 May, 2021 - Comments: 0

Every day, more applications are deploying artificial intelligence (AI) system to increase automation beyond traditional systems. The continuous growth in computing demands of AI systems require designers to develop massive, highly parallel AI processor chips. Their large sizes and types of applications have a significant impact on their design and test methodologies. With thousands of repeated... » read more

Hyperconnectivity, Hyperscale Computing, And Moving Edges
By Frank Schirrmeister - 27 May, 2021 - Comments: 0

As described in “The Four Pillars of Hyperscale Computing” last year, the four core components that development teams consider for data centers are computing, storage, memory, and networking. Over the previous decade, requirements for programmability have fundamentally changed data centers. Just over a decade ago, in 2010, virtual machines would compute user workloads on CPU-centric archite... » read more

Do We Have An IC Model Crisis?
By Brian Bailey - 27 May, 2021 - Comments: 0

Models are critical for IC design. Without them, it's impossible to perform analysis, which in turn limits optimizations. Those optimizations are especially important as semiconductors become more heterogenous, more customized, and as they are integrated into larger systems, creating a need for higher-accuracy models that require massive compute power to develop. But those factors, and other... » read more

The Road To Domain-Specific Accelerators
By Roddy Urquhart - 27 May, 2021 - Comments: 0

For about fifty years, IC designers have been relying on different types of semiconductor scaling to achieve gains in performance. Best known is Moore’s Law, which predicted that the number of transistors in a given silicon area and clock frequency would double every two years. This was combined with Dennard scaling, which predicted that with silicon geometries and supply voltages shrinki... » read more

Pushing The Limits Of Hardware-Assisted Verification
By Ann Mutschler - 27 May, 2021 - Comments: 0

As semiconductor complexity continues to escalate, so does the reliance on hardware-assisted simulation, emulation, and prototyping. Since chip design first began, engineers have complained their design goals exceeded the capabilities of the tools. This is especially evident in verification and debug, which continue to dominate the design cycle. Big-iron tooling has enabled design teams to k... » read more

Invent A New Way To Do Your Job
By Hagai Arbel - 27 May, 2021 - Comments: 0

My friends own a farm in the southwest of France, and though I spent most of my recent decades around big cities, my village-raised roots are sending me working in the fields every time I have the time. I don’t really care what I’m assigned to, as long as soil, the nearby forest trees, and the sky (preferably blue) will take part. If the job consists of repeating actions, I like to come up ... » read more

Scaling Simulation
By Brian Bailey - 27 May, 2021 - Comments: 1

Without functional simulation the semiconductor industry would not be where it is today, but some people in the industry contend it hasn't received the attention and research it deserves, causing a stagnation in performance. Others disagree, noting that design sizes have increased by orders of magnitude while design times have shrunk, pointing to simulation remaining a suitable tool for the job... » read more

Signoff DRC In P&R Lets You Get Better Products To Market Faster
By Srinivas Velivala - 27 May, 2021 - Comments: 0

Trust is generally a reflection of quality. You trust someone, be it an individual or a company, because they have, over time, consistently performed high-quality work. You trust a product because your past experience with that product has been positive, or the experiences of lots of other people have been positive. With that said, quality comes in shades and percentages. Most of us will happil... » read more

MaxLinear And Calibre RealTime Digital
By Siemens EDA - 26 May, 2021 - Comments: 0

MaxLinear implemented the Calibre RealTime Digital interface for fast, iterative, signoff DRC checking and fixing during floorplanning and placement. They not only reduce the total of batch DRC iterations, but also eliminate potential late-stage issues during final physical verification signoff that are exponentially harder to fix. Adopting the Calibre RealTime Digital interface enabled MaxLine... » read more

One-On-One: Lip-Bu Tan
By Ed Sperling - 26 May, 2021 - Comments: 0

Lip-Bu Tan, CEO of Cadence, sat down with Semiconductor Engineering to talk about the impact of massive increases in data across a variety of industries, the growing need for computational software, and the potential implications of U.S.-China relations. What follows are excerpts of that discussion. SE: What do you see as the biggest change for the chip industry? Tan: We're in our fifth g... » read more

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