How To Scale Application Security Across The Enterprise

By Synopsys - 24 Apr, 2024 - Comments: 0

Enterprise organizations have hundreds of developers on numerous teams in dozens of business units. They are all working on thousands of applications, releasing software in very rapid iteration cycles. The challenges of development across all these software development life cycles, business units, and organizational silos are well known, and the sheer scale of enterprise development multiplies ... » read more

Aeonic Generate GGM High Performance SoC Clock Generation Module

By Movellus - 24 Apr, 2024 - Comments: 0

Core counts have been increasing steadily since IBM's debut of the Power 4 in 2001, eclipsing 100 CPU cores and over 1,000 for AI accelerators. While sea of processor architectures feature a stamp and repeat design, per-core workloads aren't always going to be symmetrically balanced. For example, a cloud provider (AI or compute) will rent out individual core clusters to customers for specialize... » read more

Blog Review: April 17

By Jesse Allen - 17 Apr, 2024 - Comments: 0

Siemens' Sumit Vishwakarma highlights the importance of crystal oscillators to the proper functioning of many semiconductor devices and applications, from clock signals to transmission and reception of radio waves. Cadence's Jay Domadia introduces some of the new features in GDDR7, such as a semi-independent row and column command address bus and two modes of data signaling, enabling PAM3 fo... » read more

Blog Review: April 10

By Jesse Allen - 10 Apr, 2024 - Comments: 0

Cadence's Shyam Sharma looks at the evolution of the LPDDR standard and finds that LPDDR5X is opening new specialized markets for low-power DRAMs beyond the traditional areas of mobile, IoT, and automotive. Siemens' Hossam Sarhan and Dusan Petranovic find that new physical verification approaches are needed to ensure the performance and reliability of superconducting ICs and introduce a hybr... » read more

NoCs In 3D Space

By Brian Bailey - 03 Apr, 2024 - Comments: 0

A network on chip (NoC) has become an essential piece of technology that enables the complexity of chips to keep growing, but when designs go 3D, or when third-party chiplets become pervasive, it's not clear how NoCs will evolve or what the impact will be on chiplet architectures. A NoC enables data to move between heterogeneous computing elements, while at the same time minimizing the resou... » read more

Blog Review: Apr. 3

By Jesse Allen - 03 Apr, 2024 - Comments: 0

Siemens' Keith Felton finds that high bandwidth memory integration poses significant challenges for package designers stemming from its unique architecture and stringent performance requirements. Synopsys' Gervais Fong finds out what's new in the USB4 v2 specification, some of its unique challenges involved in doubling the performance capabilities of the USB wired connection, and an intrigui... » read more

Challenges In RISC-V Verification

By Ed Sperling - 02 Apr, 2024 - Comments: 0

Designing a single-core RISC-V processor is relatively easy, but verifying it and debugging it is a different story. And it all becomes more complicated when multiple cores are involved, and when those cores need to be cache-coherent. Ashish Darbari, CEO of Axiomise, talks with Semiconductor Engineering about using assertions and formal verification technology to find bugs and prove coherency i... » read more

Cache Coherency In Heterogeneous Systems

By Ed Sperling - 01 Apr, 2024 - Comments: 0

Until recently, coherency was something normally associated with DRAM. But as chip designs become increasingly heterogeneous, incorporating more and different types of compute elements, it becomes harder to maintain coherency in that data without taking a significant hit on performance and power. The basic problem is that not all compute elements fetch and share data at the same speed, and syst... » read more

Career Transitions

By Brian Bailey - 28 Mar, 2024 - Comments: 0

Many people change their career path, sometimes to take on new challenges, sometimes following opportunity or money. As we learn, we develop both expertise and skill sets and in many cases expertise in one area has diminished value in another, meaning that it becomes more difficult to switch as we get older. But there are times when both knowledge and skills can be fully transferred, making the... » read more

Automotive Semiconductor March Madness 2024

By Frank Schirrmeister - 28 Mar, 2024 - Comments: 0

As the US is amid "Basketball March Madness" – hard to ignore when you live in Silicon Valley – it also felt like the month of "Automotive Madness." We saw numerous announcements and events across the design chain, from semiconductor IP to software and IP providers to automotive OEMs. And in all of them, data-transport architectures, and with that networks-on-chips (NoCs), are critical. Ma... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.