category: System-Level Design

category: Auto, Security & Edge AI

Automated High-Speed Interface Routing in Multi-Die Designs
By Synopsys - 28 Jan, 2026 - Comments: 0

2.5D and 3D Multi-die design is revolutionizing chip integration by enabling thousands of high-speed connections between dies (also called chiplets). Discover how close placement of dies boosts bandwidth, minimizes latency, and maximizes data throughput. Read this white paper to find out about the importance of interconnectivity planning and die-to-die signal routing for successful m... » read more

Voice is the New UI
By Cadence - 28 Jan, 2026 - Comments: 0

Recent years have seen a paradigm shift in the user interface (UI) of our computers and client devices, and this is gaining momentum. Advancements in large language models (LLM), small language models (SLM), energy-efficient systems on chip (SoC), and on-device AI processing are making voice input the new “keyboard”. Read more here.   Fig.1: Voice Processing Pipeline On-De... » read more

Software-Defined Systems
By Ed Sperling - 26 Jan, 2026 - Comments: 0

Using high-level software languages to define semiconductors is faster, easier, and allows for more changes long before the RTL stage. This is especially useful for chiplets and embedded accelerators, which are narrower in scope and more targeted at different workloads and specific domains. But there are some caveats for engineers working in this space. Russell Klein, program director for Sieme... » read more

Blog Review: Jan. 21
By Jesse Allen - 21 Jan, 2026 - Comments: 0

Keysight's Armando Valim considers the impact of AI on the memory market as AI infrastructure pressure widens the gap between high-performance memory and lower-margin consumer memory and SSD, forcing manufacturers to make strategic decisions and define which markets to serve. Cadence's Reela Samuel breaks down the major 3D-IC packaging methods used today, from wafer stacking flows to hybrid ... » read more

Startup Funding: Q4 2025
By Jesse Allen - 19 Jan, 2026 - Comments: 0

The promise of AI dominated the last quarter of 2025. Investors were eager to claim stakes in both brand-new startups and more established companies developing AI-specific hardware, primarily for data centers, with over $1 billion alone flowing into the sector. The largest round of the quarter went to a new entrant aiming to fundamentally change how AI compute is performed, while two in-memory ... » read more

Challenges In Moving Data In Chips
By Ed Sperling - 14 Jan, 2026 - Comments: 0

The number of processes running simultaneously inside of chips is growing, fueled by massive increases in data from AI and sensors everywhere. The challenge now, particularly in multi-die assemblies, is how to prioritize where signals go, how quickly they move, and when they're supposed to arrive at shared memories. Andy Nightingale, vice president of product management and marketing at Arteris... » read more

Blog Review: Jan. 14
By Jesse Allen - 14 Jan, 2026 - Comments: 0

Arm's Paul Black demonstrates how lightweight LLVM sanitizers help detect undefined behavior, improve code quality, and expose hidden bugs in embedded C and C++ projects, with a focus on two sanitizers that can catch issues such as unsigned signed shift overflows, array overflows, and stack corruption. Imagination's Alex Pim provides an overview of LLM inference acceleration for mobile and e... » read more

EDA and IP Revenue Up 8.8%
By Ed Sperling - 13 Jan, 2026 - Comments: 0

EDA and IP revenue grew 8.8% in Q3 2025 to $5.566 billion, up from $5.115 billion in the same period in 2024, according to new data from ESD Alliance. But beneath those respectable, if not spectacular numbers, some interesting shifts are underway. China returned to double-digit growth after several quarters of lackluster sales. But the biggest surprise was EDA/IP revenues from South Korea an... » read more

Blog Review: Jan. 7
By Jesse Allen - 07 Jan, 2026 - Comments: 0

Cadence's Reela Samuel presents an overview of through-silicon vias, including structure, pitch, and electrical behavior, key layout rules such as keep-out zones and stress constraints, and how TSV parasitics influence bandwidth, latency, and system-level performance. Siemens' Andras Vass-Varnai identifies five thermal trends to watch and how they’ll reshape design and packaging workflows ... » read more

Blog Review: Dec. 24
By Jesse Allen - 24 Dec, 2025 - Comments: 0

Cadence's Jakob Engblom shares highlights from the recent SDV Europe conference, including why software-defined vehicles will require much closer, faster collaboration between suppliers and customers, with virtualization for software development and testing taking on a key role, as well as API questions and tire sensors. Synopsys' Tom De Schutter and Marc Serughetti predict that new cars wil... » read more

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