Transforming Data Management In EDA: Preparing For The AI Era


In today’s fast-paced electronics design automation (EDA) environment, effective data management has become essential. Growing design complexity, distributed teams, and the accelerating adoption of AI/ML are pushing organizations to rethink how they manage, track, and leverage decades of engineering data. From manual workarounds to data management Many engineers discover the importance ... » read more

Programmable Chips Evolve For Shifting Needs


ICs and SoCs are utilizing a range of processing elements that allow them to optimize current workloads while hedging their bets for the future. What used to be a simple choice between an ASIC, FPGA, or DSP, has evolved into a mix of processor types and architectures, including varying levels of programmability and customization. Speed is essential, but technology is evolving so quickly that... » read more

Tracking Your Preferences


I like to use my last blog of the year to focus on you, the reader. You provide valuable feedback to me and the rest of the team at Semiconductor Engineering. What do you want to see us write about? How in-depth should things be? This is always a balance between the amount of information provided and the rate at which readers tire with an article. My focus is the channels I write for – Sys... » read more

Accelerating Semiconductor Innovation Through Machine Learning-Driven Modeling


The semiconductor industry is entering an era of unprecedented complexity, driven by advanced architectures such as Gate-All-Around (GAA) transistors, wide-bandgap materials like GaN and SiC, and heterogeneous integration strategies. Traditional physics-based modeling approaches are increasingly challenged by nonlinear effects, electro-thermal interactions, and variability across device geometr... » read more

Blog Review: Dec. 17


Cadence's Shyam Sharma checks out what's new in the latest Open NAND Flash Interface 5.2 standard, including a Separate Command Address protocol that allows Hosts to optimize the command and data scheduling to increase overall available bandwidth. Siemens' Kyle Fraunfelter and Melville Bryant contend that improving semiconductor manufacturing and fab sustainability starts with a digital twin... » read more

Blog Review: Dec. 3


Cadence's Reela Samuel notes that as multi-die integration becomes the new engine of semiconductor performance, the decision between 2.5D and 3D-IC architectures shapes a design's achievable bandwidth, energy efficiency, thermal limits, system size, and even program schedules. Synopsys' Thomas Andersen suggests that the deployment of physical AI will require the fusion of advanced electronic... » read more

Blog Review: Nov. 26


Cadence's Rajneesh Chauhan explains CXL's low power state, L0p, which maintains partial lane activity for efficient power management without compromising performance, and how comprehensive verification can help ensure reliable implementation. Siemens' John Ferguson provides a brief history of design rule checking, major advancements over the years, and why introducing it in earlier design st... » read more

AI Plays Multiple Roles Within EDA


AI's infusion into our world may seem sudden and unexpected, but EDA has been quietly adopting it for more than a decade. What's changed is that it's now becoming more visible, thanks to increasingly powerful large language models (LLMs) and the need to apply them to increasingly challenging multi-physics problems. Two fundamental shifts underlie AI's increasing prominence. First, heat is be... » read more

FPGAs Find New Workloads In The High-Speed AI Era


FPGAs are finding new applications in the age of artificial intelligence, high-speed wireless communications, medical and life science technology, and in complex chip architectures where they can improve the flow of data. Field-programmable gate arrays (FPGAs) enable designers to reprogram or reconfigure digital logic after the chips have been deployed, which is essential in the AI world, wher... » read more

Shaping The Future Of AI Processors: A Tech Threads Conversation With Jim Keller


I had the pleasure of hosting renowned computer architect and Tenstorrent CEO Jim Keller, on the latest episode of Baya Systems’ Tech Threads podcast. If you haven’t already, listen to get his insights on the need for “open” intelligence architectures and what would be needed to drive the semiconductor industry forward. What is an “open” intelligent architecture and ecosystem? As... » read more

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