category: System-Level Design

category: IoT, Security & Automotive

Executive Outlook: Chiplets, 3D-ICs, and AI
By Ed Sperling - 29 May, 2025 - Comments: 0

Semiconductor Engineering sat down to discuss chiplets and the challenges of moving to 3D-ICs with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Zeng, senior engineering group director at Cadence; Anand Thiruvengadam, senior director and head of AI product ... » read more

Thermo-Mechanical Stress On Active Chiplets In A 3D-IC Heterogeneous Package Assembly
By Siemens EDA - 29 May, 2025 - Comments: 0

The move to heterogeneous multi-chip/chiplet products improves yield, performance and modularity while reducing power and overall product footprint. However, this shift to heterogeneous assembly also introduces new complexities that can influence chip warpage and circuit behavior due to thermo-mechanical stress impacts. In heterogeneous 3D IC architectures, the interaction between the chips ... » read more

CSR Management: Life Beyond Spreadsheets
By Insaf Meliane - 29 May, 2025 - Comments: 0

The ASIC, ASSP, and system-on-chip (SoC) design landscape has undergone significant evolution over the past two decades. For example, while early devices contained only tens of intellectual property (IP) blocks, modern high-end SoCs may integrate up to 1000 IPs, each containing millions of logic gates. Furthermore, unlike their predecessors, today’s SoCs are no longer primarily hardware; i... » read more

Optical Interconnectivity At 224 Gbps
By Ed Sperling - 28 May, 2025 - Comments: 0

AI is generating so much traffic that traditional copper-based approaches for moving data inside a chip, between chips, and between systems, are running out of steam. Just adding more channels is no longer viable. It requires more power to drive signals, and the distance those signals can travel without excessive loss is shrinking. Mike Klempa, product marketing specialist at Alphawave Semi, di... » read more

SoC Power Delivery Network (PDN) Telemetry And Applications
By Movellus - 28 May, 2025 - Comments: 0

PDN characterization needs visibility at the transistor. Through this white paper, we will learn why PDN visibility is crucial to each stage of the silicon lifecycle and its relation to power, performance, and in-field uptime. Register here to download the paper. » read more

AI Infrastructure: Optimized For Model Training
By Keysight - 28 May, 2025 - Comments: 0

This white paper discusses the critical infrastructure needed for efficient AI model training, emphasizing the role of network capabilities in handling vast data flows and minimizing delays. It outlines challenges in model training and innovative solutions that can enhance performance. AI Revolution: The increasing complexity of AI applications, such as autonomous vehicles and personalized m... » read more

Mastering AI Chip Complexity: Your Guide to First-Pass Silicon Success
By Synopsys - 28 May, 2025 - Comments: 0

This eBook provides a resource for innovators in the fast-changing realm of AI chip development. It delves into the opportunities and challenges of designing cutting-edge AI chips and chiplets, focusing on the transition from traditional monolithic architectures to multi-die and chiplet-based solutions. The content covers essential topics such as architectural exploration, silicon design, a... » read more

Blog Review: May 28
By Jesse Allen - 28 May, 2025 - Comments: 0

Siemens’ Patrick Hope considers how to fully perform post-route signal integrity verification on PCB designs while maintaining the project’s timeline by implementing a progressive verification methodology that enables signal integrity experts to focus on issues that demand their expertise rather than simple errors. Cadence’s Vanessa Do checks out how CXL addresses the constant demand f... » read more

Modernizing The Hardware / Software Interface – Life Beyond Spreadsheets
By Arteris - 28 May, 2025 - Comments: 0

The hardware/software interface (HSI) is the core of advanced semiconductor design, allowing seamless interaction between software and components like accelerators and peripherals. It underpins critical functions such as documentation, firmware, and hardware verification. Inefficient or outdated HSI management reduces collaboration, increases design errors, and threatens the performance and qua... » read more

Agentic AI, Multi-Block Multi-User SoC Design Platform
By Cadence - 28 May, 2025 - Comments: 0

The semiconductor industry is at an inflection point within its history. The latest technological advancements in AI, quantum computing, 5G, virtual and augmented reality, IoT, autonomous driving, and biotechnology have revolutionized the semiconductor industry. The growing demands of AI workloads and sophisticated model training are spurring highly specialized semiconductor chips with intricat... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy