Engineering Miniaturized And Low Operating Voltage Neuromorphic Platforms Across The Light Spectrum 


A technical paper titled “Long Duration Persistent Photocurrent in 3 nm Thin Doped Indium Oxide for Integrated Light Sensing and In-Sensor Neuromorphic Computation” was published by researchers at RMIT University and Deakin University (Australia). Abstract: "Miniaturization and energy consumption by computational systems remain major challenges to address. Optoelectronics based synap... » read more

A Field-Free Switching Solution For SOT Magnetic Tunnel Junction Devices


A technical paper titled “Field-Free Spin-Orbit Torque Driven Switching of Perpendicular Magnetic Tunnel Junction through Bending Current” was published by researchers at KU Leuven, ETH Zurich, and IMEC. Abstract: "Current-induced spin-orbit torques (SOTs) enable fast and efficient manipulation of the magnetic state of magnetic tunnel junctions (MTJs), making them attractive for memory, i... » read more

An Energy Efficient, Linux-Capable RISC-V Host Platform Designed For The Seamless Plug-In And Control Of Domain-Specific Accelerators


A technical paper titled “Cheshire: A Lightweight, Linux-Capable RISC-V Host Platform for Domain-Specific Accelerator Plug-In” was published by researchers at ETH Zurich and University of Bologna. Abstract: "Power and cost constraints in the internet-of-things (IoT) extreme-edge and TinyML domains, coupled with increasing performance requirements, motivate a trend toward heterogeneous arc... » read more

Uncovering The Size, Structure, And Operation Of DRAM Subarrays And Showing Experimental Results Supporting The Cause Of Rowhammer


A technical paper titled “X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands” was published by researchers at Seoul National University and University of Illinois at Urbana-Champaign. Abstract: "The demand for accurate information about the internal structure and characteristics of dynamic random-access memory (DRAM) has been on the rise. Recen... » read more

End-To-End System Architecture For Quantum RAM (Yale, AWS, Caltech)


A technical paper titled “Systems Architecture for Quantum Random Access Memory” was published by researchers at Yale University, AWS Center for Quantum Computing, and California Institute of Technology. Abstract: "Operating on the principles of quantum mechanics, quantum algorithms hold the promise for solving problems that are beyond the reach of the best-available classical algorithms.... » read more

A Step Towards Eliminating The Von-Neumann Bottleneck By Co-locating Photonic Computing Elements And Non-Volatile Memory 


A technical paper titled “Non-volatile heterogeneous III-V/Si photonics via optical charge-trap memory” was published by researchers at Hewlett Packard Enterprise. "We demonstrate, for the first time, non-volatile charge-trap flash memory (CTM) co-located with heterogeneous III-V/Si photonics. The wafer-bonded III-V/Si CTM cell facilitates non-volatile optical functionality for a variety... » read more

Object Detection CNN Suitable For Edge Processors With Limited Memory


A technical paper titled “TinyissimoYOLO: A Quantized, Low-Memory Footprint, TinyML Object Detection Network for Low Power Microcontrollers” was published by researchers at ETH Zurich. Abstract: "This paper introduces a highly flexible, quantized, memory-efficient, and ultra-lightweight object detection network, called TinyissimoYOLO. It aims to enable object detection on microcontrol... » read more

Advantages, Disadvantages, And Use Cases Of FPGAs


A technical paper titled “Data Processing with FPGAs on Modern Architectures” was published by researchers at ETH Zürich. Abstract: "Trends in hardware, the prevalence of the cloud, and the rise of highly demanding applications have ushered an era of specialization that is quickly changing the way data is processed at scale. These changes are likely to continue and accelerate in the next... » read more

A PIM Architecture That Supports Floating Point-Precision Computations Within The Memory Chip


A technical paper titled “FlutPIM: A Look-up Table-based Processing in Memory Architecture with Floating-point Computation Support for Deep Learning Applications” was published by researchers at Rochester Institute of Technology and George Mason University. Abstract: "Processing-in-Memory (PIM) has shown great potential for a wide range of data-driven applications, especially Deep Learnin... » read more

3D Memory Structures: Common Hole And Tilt Metrology Techniques and Capabilities


A technical paper titled "Inline metrology of high aspect ratio hole tilt and center line shift using small-angle x-ray scattering" was published by researchers at Bruker Nano and Lam Research. Abstract: "High aspect ratio (HAR) structures found in three-dimensional nand memory structures have unique process control challenges. The etch used to fabricate channel holes several microns deep... » read more

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