category: Packaging

category: IoT, Security & Automotive

Framework To Compile Quantum Programs Onto Chiplets (UCSB, Cisco)
By Technical Paper Link - 03 Jun, 2023 - Comments: 0

A technical paper titled "Compilation for Quantum Computing on Chiplets" was published by researchers at UC Santa Barbara and Cisco Quantum Lab. Abstract: "Chiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalability and modularity. However, as the computing scale increases, communication between qubits w... » read more

NIST Releases “Vision And Strategy for the National Semiconductor Technology Center”
By Technical Paper Link - 05 May, 2023 - Comments: 0

A paper titled "A Vision and Strategy for the National Semiconductor Technology Center" was published by the U.S. Department of Commerce’s National Institute of Standards and Technology (NIST). The paper describes how the NSTC (National Semiconductor Technology Center) will develop and safeguard chips and technologies of the future. “The NSTC will be an ambitious public-private consortiu... » read more

Data-Centric Reconfigurable Array Chiplets (Princeton)
By Technical Paper Link - 21 Apr, 2023 - Comments: 0

A technical paper titled "Massive Data-Centric Parallelism in the Chiplet Era" was published by researchers at Princeton University. Abstract: "Traditionally, massively parallel applications are executed on distributed systems, where computing nodes are distant enough that the parallelization schemes must minimize communication and synchronization to achieve scalability. Mapping communica... » read more

Power Semiconductor Devices: Thermal Management and Packaging
By Technical Paper Link - 10 Apr, 2023 - Comments: 0

A technical paper titled "Thermal management and packaging of wide and ultra-wide bandgap power devices: a review and perspective" was published by researchers at Virginia Polytechnic Institute and State University, U.S. Naval Research Laboratory, and Univ Lyon, CNRS. "This paper provides a timely review of the thermal management of WBG and UWBG power devices with an emphasis on packaged dev... » read more

Design Considerations and Recent Advancements in Chiplets (UC Berkeley/ Peking University)
By Technical Paper Link - 10 Apr, 2023 - Comments: 0

A new technical paper titled "Automated Design of Chiplets" was published by researchers at UC Berkeley and Peking University. Abstract: "Chiplet-based designs have gained recognition as a promising alternative to monolithic SoCs due to their lower manufacturing costs, improved re-usability, and optimized technology specialization. Despite progress made in various related domains, the des... » read more

Surface-Activated ALD For Room-Temperature Bonding of Al2O3
By Technical Paper Link - 03 Apr, 2023 - Comments: 0

A new technical paper titled "Room-temperature bonding of Al2O3 thin films deposited using atomic layer deposition" was published by researchers at Kyushu University. Abstract "In this study, room-temperature wafer bonding of Al2O3 thin films on Si thermal oxide wafers, which were deposited using atomic layer deposition (ALD), was realized using the surface-activated bonding (SAB) metho... » read more

Room-Temperature Metal Bonding Technology That Facilitates The Fabrication of 3D-ICs & 3D Integration With Heterogeneous Devices
By Technical Paper Link - 19 Mar, 2023 - Comments: 0

A technical paper titled "Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED" was published by researchers at Tohoku University in Japan. Abstract: "This letter describes a direct Cu bonding technology to there-dimensionally integrate heterogeneous dielets based on a chip-on-wafer configuration. 100- μm -cubed blue μ LED... » read more

Evaluation of the Thermomechanical Reliability of Electronic Packages Using Virtual Prototyping
By Technical Paper Link - 18 Mar, 2023 - Comments: 0

A new technical paper titled "Design Optimization by Virtual Prototyping Using Numerical Simulation to Ensure Thermomechanical Reliability in the Assembly and Interconnection of Electronic Assemblies" was published by Fraunhofer ENAS. Abstract "A methodology is presented that allows the evaluation of the thermomechanical reliability of electronic packages using “virtual prototyping.” He... » read more

Chiplet Placer with Thermal Consideration for 2.5D ICs
By Technical Paper Link - 27 Feb, 2023 - Comments: 0

A new technical paper titled "Chiplet Placement for 2.5D IC with Sequence Pair Based Tree and Thermal Consideration" was published by researchers at National Yang Ming Chiao Tung University (Taiwan). Abstract "This work develops an efficient chiplet placer with thermal consideration for 2.5D ICs. Combining the sequence-pair based tree, branch-and-bound method, and advanced placement/pruning... » read more

Advanced Packaging for High-Bandwidth Memory: Influences of TSV size, TSV Aspect Ratio And Annealing Temperature
By Technical Paper Link - 13 Feb, 2023 - Comments: 0

A technical paper titled "Stress Issue of Vertical Connections in 3D Integration for High-Bandwidth Memory Applications" was published by researchers at National Yang Ming Chiao Tung University. Abstract: "The stress of TSV with different dimensions under annealing condition has been investigated. Since the application of TSV and bonding technology has demonstrated a promising approach for ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy