Better Inspection, Higher Yield


Wafers can be inspected for large, obvious defects, or for small, subtle ones. The former is referred to as macro-inspection, while the latter is micro-inspection. These processes use different machines with different capital and operating costs, and they might look like competing approaches with different economic returns. In fact, they are complementary tactics that can be balanced within an ... » read more

Far Out AI In Remote Locations


There really isn’t anything that you can do on Earth with electronics that you can’t do in space, but it certainly can be a lot harder and take longer to fix is something goes wrong. And as more intelligent electronics are launched into space, the concern over potential failures is growing. AI inferencing has been pushing out further for some time, and it is starting to redefine what con... » read more

Software-Defined Vehicles


Automobiles long ago stopped being purely mechanical systems. But as more components are electrified — and, in particular, as the drivetrain is electrified — cars are becoming software-defined vehicles. Some think of such cars as computers on wheels. But as these systems continue to evolve, adding in more assisted and semi-autonomous capabilities, that comparison is looking increasingly ... » read more

Interconnects Emerge As Key Concern For Performance


Interconnects are becoming increasingly challenging to design, implement and test as the amount of data skyrockets and the ability to move that data through denser arrays of compute elements and memories becomes more difficult. The idea of an interconnect is rather simple, but ask two people what constitutes an interconnect and you're likely to get very different answers. Interconnects are e... » read more

All-in-One Vs. Point Tools For Security


Security remains an urgent concern for builders of any system that might tempt attackers, but designers find themselves faced with a bewildering array of security options. Some of those are point solutions for specific pieces of the security puzzle. Others bill themselves as all-in-one, where the whole puzzle filled in. Which approach is best depends on the resources you have available and y... » read more

Components For Open-Source Verification


Defining an open-source verification methodology is a lot more difficult than just developing an open-source simulator. This is the reality facing open-source hardware such as RISC-V. Some people may be asking for the corresponding open-source verification, but that is a much tougher problem — and it is not going to be solved in the short term. Part one examined the reasons why open-source... » read more

Startup Funding: August 2020


Semiconductor startups were hot this month, with big funding going to designers and chip analytics. In automotive, one Chinese electric vehicle company raised another large round right before its IPO, and a LiDar maker's reverse merger gave it a cash infusion and set it on its own IPO road. Plus, a growing quantum computer developer saw a funding boost. This month, we feature 17 startups that c... » read more

New Architectures, Much Faster Chips


The chip industry is making progress in multiple physical dimensions and with multiple architectural approaches, setting the stage for huge performance increases based on more modular and heterogeneous designs, new advanced packaging options, and continued scaling of digital logic for at least a couple more process nodes. A number of these changes have been discussed in recent conferences. I... » read more

Challenges In Using AI In Verification


Pressure to use AI/ML techniques in design and verification is growing as the amount of data generated from complex chips continues to explode, but how to begin building those capabilities into tools, flows and methodologies isn't always obvious. For starters, there is debate about whether the data needs to be better understood before those techniques are used, or whether it's best to figure... » read more

The Evolution Of High-Level Synthesis


High-level synthesis is getting yet another chance to shine, this time from new markets and new technology nodes. But it's still unclear how fully this technology will be used. Despite gains, it remains unlikely to replace the incumbent RTL design methodology for most of the chip, as originally expected. Seen as the foundational technology for the next generation of EDA companies around the ... » read more

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