category: Top Stories

category: IoT, Security & Automotive

The Rising Cost Of 5G
By Ed Sperling - 22 Aug, 2018 - Comments: 0

Semiconductor Engineering sat down to talk about challenges and progress in 5G with Yorgos Koutsoyannopoulos, president and CEO of Helic; Mike Fitton, senior director of strategic planning and business development at Achronix; Sarah Yost, senior product marketing manager at National Instruments; and Arvind Vel, director of product management at ANSYS. What follows are excerpts of that conversat... » read more

3D NAND Flash Wars Begin
By Mark LaPedus - 20 Aug, 2018 - Comments: 0

3D NAND suppliers are gearing up for a new battle amid a period of price and competitive pressures, racing each other to the next technology generations. Competition is intensifying as a new player enters the 3D NAND market—China’s Yangtze Memory Technologies Co. (YMTC). Backed by billions of dollars in funding from the Chinese government, YMTC recently introduced its first 3D NAND techn... » read more

Next-Gen Memory Ramping Up
By Mark LaPedus - 16 Aug, 2018 - Comments: 6

The next-generation memory market is heating up as vendors ramp a number of new technologies, but there are some challenges in bringing these products into the mainstream. For years, the industry has been working on a variety of memory technologies, including carbon nanotube RAM, FRAM, MRAM, phase-change memory and ReRAM. Some are shipping, while others are in R&D. Each memory type is di... » read more

Inspecting Unpatterned Wafers
By Mark LaPedus - 16 Aug, 2018 - Comments: 1

Unpatterned wafer inspection, which has flown well under the radar for most of the semiconductor industry, is becoming more critical amid the need to find defects earlier in the manufacturing process flow. Finding those defects is getting harder as critical dimensions shrink. It's more difficult to actually detect smaller defects on bare wafers, there is more data to process, and there is mo... » read more

Big Shifts In Tech Conferences
By Ed Sperling - 16 Aug, 2018 - Comments: 0

By Ed Sperling and Katherine Derbyshire Identifying central themes in technology conferences, or finding enough latitude where the theme is extremely well defined, is becoming challenging throughout the tech industry. Throughout the semiconductor industry, in particular, many are asking how various organizations will differentiate conferences in the future and who will be the target audience... » read more

Old Vs. New Packages
By Jeff Dorsch - 15 Aug, 2018 - Comments: 2

Over the years, the semiconductor industry has witnessed a parade of packaging innovations, such as system-in-package, semiconductor embedded in substrate, and fan-out wafer-level packaging. Two interesting packaging innovations are now being used in the process of miniaturizing microchips and electronics. One is a new concept that combines two tried-and-true technologies. The other is a de... » read more

Where FD-SOI Works Best (Part 2)
By Ed Sperling - 15 Aug, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss changes in the FD-SOI world and what's behind them, with James Lamb, deputy CTO for advanced semiconductor manufacturing and corporate technical fellow at Brewer Science; Giorgio Cesana, director of technical marketing at STMicroelectronics; Olivier Vatel, senior vice president and CTO at Screen Semiconductor Solutions; and Carlos Mazure, CTO at Soi... » read more

AI Architectures Must Change
By Brian Bailey - 13 Aug, 2018 - Comments: 4

Using existing architectures for solving machine learning and artificial intelligence problems is becoming impractical. The total energy consumed by AI is rising significantly, and CPUs and GPUs increasingly are looking like the wrong tools for the job. Several roundtables have concluded the best opportunity for significant change happens when there is no legacy IP. Most designs have evolved... » read more

Do Parallel Tools Make Sense?
By Brian Bailey - 10 Aug, 2018 - Comments: 0

Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for ... » read more

Chip Aging Becomes Design Problem
By Brian Bailey - 09 Aug, 2018 - Comments: 9

Chip aging is a growing problem at advanced nodes, but so far most design teams have not had to deal with it. That will change significantly as new reliability requirements roll out across markets such as automotive, which require a complete analysis of factors that affect aging. Understanding the underlying physics is critical, because it can lead to unexpected results and vulnerabilities. ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy