Faster Verification With AI, ML


Tool providers have continually improved the performance, capacity, and memory footprint parameters of functional verification engines over the past decade. Today, although the core anchors are still formal verification, simulation, emulation, and FPGA-based prototyping, a new frontier focusing on the verification fabric itself aims to make better use of these engines including planning, alloca... » read more

New 5G Hurdles


Semiconductor Engineering sat down to talk about challenges and progress in 5G with Yorgos Koutsoyannopoulos, president and CEO of Helic; Mike Fitton, senior director of strategic planning and business development at Achronix; Sarah Yost, senior product marketing manager at National Instruments; and Arvind Vel, director of product management at ANSYS. What follows are excerpts of that conversat... » read more

Why Parallelization Is So Hard


Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for ... » read more

Pros, Cons Of ML-Specific Chips


Semiconductor Engineering sat down with Rob Aitken, an Arm fellow; Raik Brinkmann, CEO of OneSpin Solutions; Patrick Soheili, vice president of business and corporate development at eSilicon; and Chris Rowen, CEO of Babblelabs. What follows are excerpts of that conversation. To view part one, click here. Part two is here. SE: Is the industry's knowledge of machine learning keeping up with th... » read more

Debug Issues Grow At New Nodes


Debugging and testing chips is becoming more time-consuming, more complicated, and significantly more difficult at advanced nodes as well as in advanced packages. The main problem is that there are so many puzzle pieces, and so many different use cases and demands on those pieces, that it's difficult to keep track of all the changes and potential interactions. Some blocks are "on" sometimes,... » read more

When Bugs Escape


Bugs are a fact of life, and they always have been. But verification methodologies may not have evolved fast enough to keep up with the growing size and complexity of systems. The types of bugs are changing, too. Some people call these corner cases. Others call them outliers. Still another group refers to them as simulation-resistance superbugs. In markets such as automotive, the notion o... » read more

Where ML Works Best


Anirudh Devgan, president of Cadence, sat down with Semiconductor Engineering to discuss machine learning inside and outside of EDA tools and how that will affect the future of chip and system design. What follows are excerpts of that discussion. SE: How do you see the market and use of machine learning shaping up? Devgan: There are three main areas—machine learning inside, machine lear... » read more

Mixed Outlook For Semi Biz


Both the IC and fab equipment industries have been enjoying a boom cycle for some time, but they could be facing speed bumps and possibly turbulence in the second half of this year and into 2019. In the first half of 2018, the industry was fueled by the momentum carried over from 2017. DRAM prices remained relatively high, which contributed to the revenue growth in the overall IC industry. M... » read more

On-Chip Monitoring Of FinFETs


Stephen Crosher, CEO of Moortec, sat down with Semiconductor Engineering to discuss on-chip monitoring and its impact on power, security and reliability, including predictive maintenance. What follows are excerpts of that conversation. SE: What new problems are you seeing in design? Crosher: There are challenges emerging for companies working on advanced nodes, including scaling and trans... » read more

Verification As A Flow (Part 3)


Semiconductor Engineering sat down to discuss the transformation of verification from a tool to a flow with Vladislav Palfy, global manager application engineering for OneSpin Solutions; Dave Kelf, chief marketing officer for Breker Verification Systems; Mark Olen, product marketing group manager for Mentor, A Siemens Business; Larry Melling, product management director, System & Verificati... » read more

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