Nanoimprint Finally Finds Its Footing


Nanoimprint lithography, which for decades has trailed behind traditional optical lithography, is emerging as the technology of choice for the rapidly growing photonics and biotech chips markets. First introduced in the mid-1990s, nanoimprint lithography (NIL) has consistently been touted as a lower-cost alternative to traditional optical lithography. Even today, NIL potentially is capable o... » read more

How Chip Engineers Plan To Use AI


Experts at the Table: Semiconductor Engineering sat down to discuss how AI is being used today and how engineers expect to use it in the future, with Michael Jackson, corporate vice president for R&D at Cadence; Joel Sumner, vice president of semiconductor and electronics engineering at National Instruments; Grace Yu, product and engineering manager at Meta; and David Pan, professor in the ... » read more

Using AI To Improve Metrology Tooling


Virtual metrology is carefully being added into semiconductor manufacturing, where it is showing positive results, but the chip industry is proceeding cautiously. The first use of this technology has been for augmenting existing fab processes, such as advanced process control (APC). Controlling processes and managing yield generally do not require GPU processing and advanced algorithms, so t... » read more

Thermal Integrity Challenges Grow In 2.5D


Thermal integrity is becoming much harder to predict accurately in 2.5D and 3D-IC, creating a cascade of issues that can affect everything from how a system behaves to reliability in the field. Over the past decade, silicon interposer technology has evolved from a simple interconnect into a critical enabler for heterogeneous integration. Interposers today may contain tens of dies or chiplets... » read more

What Designers Need To Know About GAA


While only 12 years old, finFETs are reaching the end of the line. They are being supplanted by gate-all-around (GAA), starting at 3nm [1], which is expected to have a significant impact on how chips are designed. GAAs come in two main flavors today — nanosheets and nanowires. There is much confusion about nanosheets, and the difference between nanosheets and nanowires. The industry still ... » read more

Transitioning To Photonics


Silicon photonics is undergoing a resurgence as traditional approaches for reducing power and heat become more difficult and expensive, opening the door to a whole new set of technological challenges and driving up demand for a skill set that is in short supply today. From a technology standpoint, photonics is extremely complex. Signals drift, they are modulated with heat, and structures lik... » read more

RISC-V Driving New Verification Concepts


Semiconductor Engineering sat down to discuss gaps in tools and why new methodologies are needed for RISC-V processors, with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, ... » read more

What Data Center Chipmakers Can Learn From Automotive


Automotive OEMs are demanding their semiconductor suppliers achieve a nearly unmeasurable target of 10 defective parts per billion (DPPB). Whether this is realistic remains to be seen, but systems companies are looking to emulate that level of quality for their data center SoCs. Building to that quality level is more expensive up front, although ultimately it can save costs versus having to ... » read more

Challenges In Photonics Testing


Photonics is poised for significant growth due a rapid increase in data volumes and the need to move that data quickly and with minimal heat. But to reach its full potential photonics will have to overcome several production hurdles. The biggest challenge today involves alignment. While the industry is poised to produce billions of units, it still relies on testing practices that don't scale. ... » read more

Challenges Grow For CD-SEMs At 5nm And Beyond


CD-SEM, the workhorse metrology tool used by fabs for process control, is facing big challenges at 5nm and below. Traditionally, CD-SEM imaging has relied on a limited number of image frames for averaging, which is necessary both to maintain throughput speeds and to minimize sample damage from the electron beam itself. As dimensions get smaller, these limitations result in higher levels of n... » read more

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