IP Becoming More Complex, More Costly


Success in the semiconductor intellectual property (IP) market requires more than a good bit of RTL. New advances mandate a complete design, implementation, and verification team, which limits the number of companies competing in this market. What constitutes an IP block has changed significantly since the concept was first introduced in the 1990s. What was initially just a piece of RTL (reg... » read more

Automotive Relationships Shifting With Chiplets


The automotive industry is in the midst of a tremendous and rapid change on many fronts. OEMs are exploring new functions and features to add to their vehicles, including chiplets, electrification, autonomous features, as well as new vehicle architectures that will determine how vehicles are going to be designed from the foundation up. All of this is dependent on the relationships between all o... » read more

Chips Getting More Secure, But Not Quickly Enough


Experts at the Table: Semiconductor Engineering sat down to talk about the impact of heterogeneous integration, more advanced RISC-V designs, and a growing awareness of security threats, with Mike Borza, Synopsys scientist; John Hallman, product manager for trust and security at Siemens EDA; Pete Hardee, group director for product management at Cadence; Paul Karazuba, vice president of marketin... » read more

Etch Processes Push Toward Higher Selectivity, Cost Control


Plasma etching is perhaps the most essential process in semiconductor manufacturing, and possibly the most complex of all fab operations next to photolithography. Nearly half of all fab steps rely on a plasma, an energetic ionized gas, to do their work. Despite ever-shrinking transistor and memory cells, engineers continue to deliver reliable etch processes. “To sustainably create chips... » read more

Challenges Grow For Creating Smaller Bumps For Flip Chips


New bump structures are being developed to enable higher interconnect densities in flip-chip packaging, but they are complex, expensive, and increasingly difficult to manufacture. For products with high pin counts, flip-chip [1] packages have long been a popular choice because they utilize the whole die area for interconnect. The technology has been in use since the 1970s, starting with IBM�... » read more

Managing Yield With EUV Lithography And Stochastics


Identifying issues that actually affect yield is becoming more critical and more difficult at advanced nodes, but there is progress. Although they are closely related, yield management and process control are not the same. Yield management seeks to maximize the number of functioning devices at the end of the line. Process control focuses on keeping each individual device layer within its des... » read more

Machine Vision Plus AI/ML Adds Vast New Opportunities


Traditional technology companies and startups are racing to combine machine vision with AI/ML, enabling it to "see" far more than just pixel data from sensors, and opening up new opportunities across a wide swath of applications. In recent years, startups have been able to raise billions of dollars as new MV ideas come to light in markets ranging from transportation and manufacturing to heal... » read more

How Metrology Tools Stack Up In 3D NAND Devices


Multiple innovations in semiconductor processing are needed to enable 3D NAND bit density increases of about 30% per year at ever-decreasing cost per bit, all of which will be required to meet the nonvolatile storage needs of the big data era. 3D NAND is the first truly three-dimensional device in production. It is both a technology driver for new metrology methods and a significant part of ... » read more

Holistic Power Reduction


The power consumption of a device is influenced by every stage of the design, development, and implementation process, but identifying opportunities to save power no longer can be just about making hardware more efficient. Tools and methodologies are in place for most of the power-saving opportunities, from RTL down through implementation, and portions of the semiconductor industry already a... » read more

Making Tradeoffs With AI/ML/DL


Machine learning, deep learning, and AI increasingly are being used in chip design, and they are being used to design chips that are optimized for ML/DL/AI. The challenge is understanding the tradeoffs on both sides, both of which are becoming increasingly complex and intertwined. On the design side, machine learning has been viewed as just another tool in the design team's toolbox. That's s... » read more

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