EDA Makes A Frenzied Push Into Machine Learning

By Ed Sperling - 27 Apr, 2023 - Comments: 0

Machine learning is becoming a competitive prerequisite for the EDA industry. Big chipmakers are endorsing and demanding it, and most EDA companies are deploying it for one or more steps in the design flow, with plans to add much more over time. In recent weeks, the three largest EDA vendors have made sweeping announcements about incorporating ML into their tools at their respective user eve... » read more

True 3D-IC Problems

By Brian Bailey - 27 Apr, 2023 - Comments: 0

Placing logic on logic may sound like a small step, but several problems must be overcome to make it a reality. True 3D involves wafers stacked on top of each other in a highly integrated manner. This is very different from 2.5D integration, where logic is placed side-by-side, connected by an interposer. And there are some intermediate solutions today where significant memory is stacked on l... » read more

Designing For In-Circuit Monitors

By Ann Mutschler - 27 Apr, 2023 - Comments: 0

In every application space the semiconductor ecosystem touches, in-circuit monitors and sensors are playing an increasing role in silicon lifecycle management and concepts around reliability and resiliency — both during design as well as in the field. The combination of true system-level design, in/on-chip monitors, and improved data analysis are expected to drastically improve reliability... » read more

New Standards Push Co-Packaged Optics

By Karen Heyman - 26 Apr, 2023 - Comments: 0

Co-packaged optics (CPOs) promise five times the bandwidth of pluggable connections, but the new architecture requires multiple changes to accommodate different applications. The Optical Internetworking Forum (OIF) recently published standards for co-packaged optics, which are the photonic industry’s hope for handling today’s faster Ethernet interfaces, as well as increasing speeds and p... » read more

IC Security Issues Grow, Solutions Lag

By Ed Sperling - 24 Apr, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the growing chip security threat and what's being done to mitigate it, with Mike Borza, Synopsys scientist; John Hallman, product manager for trust and security at Siemens EDA; Pete Hardee, group director for product management at Cadence; Paul Karazuba, vice president of marketing at Expedera; and Dave Kelf, CEO of Breker V... » read more

Assist Layers: The Unsung Heroes of EUV Lithography

By Katherine Derbyshire - 20 Apr, 2023 - Comments: 0

Most discussions of advanced lithography focus on three elements — the exposure system, photomasks, and photoresists — but that's only part of the challenge. Successfully transferring a pattern from the photomask to a physical structure on the wafer also depends on a variety of films working together, including the underlayers, the developers, and a variety of surface treatments. In fact... » read more

Smarter Ways To Manufacture Chips

By Anne Meixner - 20 Apr, 2023 - Comments: 0

OSAT and wafer fabs are beginning to invest in Industry 4.0 solutions in order to improve efficiency and reduce operating costs, but it's a complicated process that involves setting up frameworks to evaluate different options and goals. Semiconductor manufacturing facilities have relied on dedicated automation teams for decades. These teams track and schedule chip production, respond to equi... » read more

Nanoimprint Finally Finds Its Footing

By Gregory Haley - 20 Apr, 2023 - Comments: 2

Nanoimprint lithography, which for decades has trailed behind traditional optical lithography, is emerging as the technology of choice for the rapidly growing photonics and biotech chips markets. First introduced in the mid-1990s, nanoimprint lithography (NIL) has consistently been touted as a lower-cost alternative to traditional optical lithography. Even today, NIL potentially is capable o... » read more

How Chip Engineers Plan To Use AI

By Ed Sperling - 19 Apr, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss how AI is being used today and how engineers expect to use it in the future, with Michael Jackson, corporate vice president for R&D at Cadence; Joel Sumner, vice president of semiconductor and electronics engineering at National Instruments; Grace Yu, product and engineering manager at Meta; and David Pan, professor in the ... » read more

Using AI To Improve Metrology Tooling

By Laura Peters - 17 Apr, 2023 - Comments: 0

Virtual metrology is carefully being added into semiconductor manufacturing, where it is showing positive results, but the chip industry is proceeding cautiously. The first use of this technology has been for augmenting existing fab processes, such as advanced process control (APC). Controlling processes and managing yield generally do not require GPU processing and advanced algorithms, so t... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.