Optimizing Scan Test For Complex ICs


As chips become more heterogeneous with more integrated functionality, testing them presents increasing challenges — particularly for high-speed system-on-chip (SoC) designs with limited test pin availability. In addition, the complexity of emerging packages like 3D and chiplets necessitates comprehensive new solutions that can provide faster results at multiple stages in the silicon lifec... » read more

ML Automotive Chip Design Takes Off


Machine learning is increasingly being deployed across a wide swath of chips and electronics in automobiles, both for improving reliability of standard parts and for the creation of extremely complex AI chips used in increasingly autonomous applications. On the design side, the majority of EDA tools today rely on reinforcement learning, a machine learning subset of AI that teaches a machine ... » read more

Data Leakage Becoming Bigger Issue For Chipmakers


Data leakage is becoming more difficult to stop or even trace as chips become increasingly complex and heterogeneous, and as more data is stored and utilized by chipmakers for other designs. Unlike a cyberattack, which typically is done for a specific purpose, such as collecting private data or holding a system ransom, data leaks can spring up anywhere. And as the value of data increases, th... » read more

Role Of IoT Software Expanding


IoT software is becoming much more sophisticated and complex as vendors seek to optimize it for specific applications, and far more essential for vendors looking to deliver devices on-time and on-budget across multiple market segments. That complexity varies widely across the IoT. For example, the sensor monitoring for a simple sprinkler system is far different than the preventive maintenanc... » read more

Startup Funding: April 2023


Packaging was a hot spot in April, with one of the largest rounds going to a middle-end-of-line advanced packaging company. A second packaging company also drew significant funding for its focus on wafer-level packaging for CMOS image sensors. Two packaging substrate manufacturers also saw investment. Two photoresist makers also drew sizeable rounds. Both they and the packaging companies are... » read more

AI Adoption Slow For Design Tools


A lot of excitement, and a fair amount of hype, surrounds what artificial intelligence (AI) can do for the EDA industry. But many challenges must be overcome before AI can start designing, verifying, and implementing chips for us. Should AI replace the algorithms in use today, or does it have a different role to play? At the end of the day, AI is a technique that has strengths and weaknesses... » read more

EDA Makes A Frenzied Push Into Machine Learning


Machine learning is becoming a competitive prerequisite for the EDA industry. Big chipmakers are endorsing and demanding it, and most EDA companies are deploying it for one or more steps in the design flow, with plans to add much more over time. In recent weeks, the three largest EDA vendors have made sweeping announcements about incorporating ML into their tools at their respective user eve... » read more

True 3D-IC Problems


Placing logic on logic may sound like a small step, but several problems must be overcome to make it a reality. True 3D involves wafers stacked on top of each other in a highly integrated manner. This is very different from 2.5D integration, where logic is placed side-by-side, connected by an interposer. And there are some intermediate solutions today where significant memory is stacked on l... » read more

Designing For In-Circuit Monitors


In every application space the semiconductor ecosystem touches, in-circuit monitors and sensors are playing an increasing role in silicon lifecycle management and concepts around reliability and resiliency — both during design as well as in the field. The combination of true system-level design, in/on-chip monitors, and improved data analysis are expected to drastically improve reliability... » read more

New Standards Push Co-Packaged Optics


Co-packaged optics (CPOs) promise five times the bandwidth of pluggable connections, but the new architecture requires multiple changes to accommodate different applications. The Optical Internetworking Forum (OIF) recently published standards for co-packaged optics, which are the photonic industry’s hope for handling today’s faster Ethernet interfaces, as well as increasing speeds and p... » read more

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