Expedera: Custom Deep Learning Accelerators Through Soft-IP


Internet of Things (IoT) and Artificial Intelligence (AI) have caused a massive increase in data generation — and along with it, a need to process data faster and more efficiently. Dubbed a “tsunami of data,” data centers are expected to consume about one-fifth of worldwide energy before 2030. This data explosion is driving a wave of startups looking to gain a foothold in custom accele... » read more

Slowdown, But No Correction


The market for chips will continue to grow over the next few years, but not as quickly as over the past couple years when the work-at-home market drove up demand for everything from laptops and TVs to home video equipment. Economists painted a mixed picture for the semiconductor industry at this week's SEMI Industry Strategy Symposium, projecting continue growth in all major markets, but tem... » read more

Startup Funding: March 2022


Semiconductor manufacturing, test, and inspection equipment startups did well in March. Investors funded a wide variety of equipment companies, including test equipment, materials handling, and those that make parts and components. In the manufacturing space, several companies developing manufacturing execution systems received funding, as well as a startup trying to prevent counterfeit parts f... » read more

EDA On Cloud Presents Unique Challenges


Discussions about cloud-based EDA tools are heating up for both hardware and software engineering projects, opening the door to vast compute resources that can be scaled up and down as needed. Still, not everyone is on board with this shift, and even companies that use the cloud don't necessarily want to use it for every aspect of chip design. But the number of cloud-based EDA tools is growi... » read more

Clocks Getting Skewed Up


At a logical level, synchronous designs are very simple and the clock just happens. But the clocking network is possibly the most complex in a chip, and it's fraught with the most problems at the physical level. To some, the clock is the AC power supply of the chip. To others, it is an analog network almost beyond analysis. Ironically, there are no languages to describe clocking, few tools t... » read more

Improving Memory Efficiency And Performance


This is the second of two parts on CXL vs. OMI. Part one can be found here. Memory pooling and sharing are gaining traction as ways of optimizing existing resources to handle increasing data volumes. Using these approaches, memory can be accessed by a number of different machines or processing elements on an as-needed basis. Two protocols, CXL and OMI, are being leveraged to simplify thes... » read more

Incremental Design Breakdown


For the past two decades, most designs have been incremental in nature. They heavily leveraged IP used in previous designs, and that IP often was developed by third parties. But there are growing problems with that methodology, especially at advanced nodes where back-end issues and the impact of 'shift left' are reducing the savings from reuse. The value of IP reuse has been well established... » read more

How To Justify A Data Center


The breadth of cloud capabilities and improvements in cost and licensing structures is prompting chipmakers to consider offloading at least some of their design work into the cloud. Cloud is a viable business today for semiconductor design. Over the past decade, the interest in moving to cloud computing has grown from an idea that was fun to talk about — but which no one was serious about ... » read more

Planning EDA’s Next Steps


Anirudh Devgan, Cadence's new CEO, and the recipient of the Phil Kaufman Award in December, sat down with Semiconductor Engineering to talk about what's next in EDA, the underlying technology and business challenges and changes, and new markets that are unfolding for floor-planning, verification, CFD, and advanced packaging. SE: Where does EDA need to improve? Devgan: We have made it much... » read more

CXL and OMI: Competing or Complementary?


System designers are looking at any ideas they can find to increase memory bandwidth and capacity, focusing on everything from improvements in memory to new types of memory. But higher-level architectural changes can help to fulfill both needs, even as memory types are abstracted away from CPUs. Two new protocols are helping to make this possible, CXL and OMI. But there is a looming question... » read more

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