Unintended Coupling Issues Grow


The number of indirect and often unexpected ways in which one design element may be affected by another is growing, making it more difficult to ensure a chip — or multiple chips in a package — will perform reliably. Long gone are the days when the only way that one part of a circuit could influence another was by an intended wire connecting them. As geometries get smaller, frequencies go... » read more

Transistors Reach Tipping Point At 3nm


The semiconductor industry is making its first major change in a new transistor type in more than a decade, moving toward a next-generation structure called gate-all-around (GAA) FETs. Although GAA transistors have yet to ship, many industry experts are wondering how long this technology will deliver — and what new architecture will take over from there. Barring major delays, today’s GAA... » read more

Technology Advances, Shortages Seen For Wire Bonders


A surge in demand for IC packages is causing long lead times for wire bonders, which are used to assemble three-fourths of the world’s packages. The wire bonder market doubled last year, alongside advanced packaging’s rise. Wirebonding is an older technology that typically flies under the radar. Still, packaging houses have multitudes of these key tools that help assemble many — but no... » read more

Silicon-based Power Semis Face Challenges


Suppliers of power semiconductors continue to develop and ship devices based on traditional silicon technology, but silicon is nearing its limits and faces increased competition from technologies like GaN and SiC. In response, the industry is finding ways to extend traditional silicon-based power devices. Chipmakers are eking out more performance and prolonging the technology, at least in th... » read more

Unsolved Issues In Next-Gen Photomasks


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Preparing For 3D-ICs


Experts at the Table: Semiconductor Engineering sat down to discuss the changes in design tools and methodologies needed for 3D-ICs, with Sooyong Kim, director and product specialist for 3D-IC at Ansys; Kenneth Larsen, product marketing director at Synopsys; Tony Mastroianni, advanced packaging solutions director at Siemens EDA; and Vinay Patwardhan, product management group director at Cadence... » read more

Improving PPA In Complex Designs With AI


The goal of chip design always has been to optimize power, performance, and area (PPA), but results can vary greatly even with the best tools and highly experienced engineering teams. Optimizing PPA involves a growing number of tradeoffs that can vary by application, by availability of IP and other components, as well as the familiarity of engineers with different tools and methodologies. Fo... » read more

CFD Playing Increasing Role In Design


With thermal issues and constraints increasing becoming integral concerns of electronics design, computational fluid dynamics technology is gaining traction as a way to model, analyze, predict, and ideally prevent thermal problems from materializing. From cooling a board to cooling a chip with a fan and heat sinks, all of this relies on air flow for the cooling, or the flow of liquid in some... » read more

Why Data Center Power Will Never Come Down


Data centers have become significant consumers of energy. In order to deal with the proliferation of data centers and the servers within them, there is a big push to reduce the energy consumption of all data center components. With all that effort, will data center power really come down? The answer is no, despite huge improvements in energy efficiency. “Keeping data center power consum... » read more

Spreadsheets: Still Valuable, But More Limited


Spreadsheets have been an invaluable engineering tool for many aspects of semiconductor design and verification, but their inability to handle complexity is squeezing them out of an increasing number of applications. This is raising questions about whether they still have a role, and if so, how large that role will be. There are two sides to this issue. On one side are the users who see them... » read more

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