Exploring Machine Learning Enabled Microcontrollers As An Alternative To Linux-Based MPUs


In today’s rapidly evolving technology landscape, the distinction between microcontrollers (MCUs) and micro processors (MPUs) is blurring with the introduction of high-performance Arm Cortex M processors. A compelling proposition emerges when a highly integrated device, PSOC™ Edge MCU, combines the power of the Cortex®M55 with advanced graphic peripherals, DSP Helium, and a neural net... » read more

Bird’s Eye View on Tensilica Vision DSPs


The increasing use of cameras in automotive advanced driver assistance systems (ADAS) has resulted in a greater demand for the capability and performance of vision applications. This demand requires sophisticated vision processing algorithms and powerful digital signal processors (DSPs) to run them. Because of the limited power and cost budgets of these embedded systems, it is important t... » read more

Ready For Curvilinear: New Innovations For Resistance Extraction


The rapid evolution of semiconductor industry, fueled by the propagation of IOT applications, image sensors, photonics and MEMS applications and other emerging technologies dramatically increased the complexity of IC design. Designers often use unconventional structures to achieve the desired functionality and optimal performance. For example, image sensors use wide polygons in the layout and a... » read more

Chiplets and the Early Adopter’s Dilemma


Early adopters of a new technology often face a serious dilemma. On one hand, moving early means exploiting the most aggressive new technology available. But on the other hand, making early technology decisions can lock a product line into a path that will later become uncompetitive—either a single-vendor solution that can’t guarantee continuity of supply, or a roadmap that can’t shift an... » read more

Enabling Efficient Multi-Die Design Implementation and IP Integration


Many industry trends are driving chip developers to consider multi-die designs using advanced 2.5D and 3D technologies. Such designs enable incorporating heterogeneous and homogeneous dies in a single package, increasing density while reducing signal propagation times. However, multi-die designs introduce new challenges that must be addressed by all relevant electronic design automation (EDA) a... » read more

Wire Bond Electrical Structural Test Methodologies


Wire bonding, a foundational process in microelectronics, is essential to establishing a robust and low-resistance electrical connection between semiconductor chips and their respective packages or, in the case of multi-chip modules, between different chips. This intricate process ensures the device's functionality, reliability, and overall performance. Wire bonding faces several challenges ... » read more

Making Cache Coherent SoC Design Easier with Ncore


As the number and variety of computing elements in SoCs grow, specific application areas require the tight connection of key processing elements through coherency. Ncore Interconnect IP from Arteris makes cache coherent SoC designs easier, saving 100’s of person-years effort per project vs DIY solutions. This white paper discusses the challenges and solutions in designing cache-coherent Sy... » read more

Intel and Cadence Collaboration on UCIe: Demonstration of Simulation Interoperability


The Universal Chiplet Interconnect Express (UCIe) 1.0 specification was announced in early 2022. A new updated UCIe 1.1 specification was released on August 8, 2023. The standardized open chiplet standard allows for heterogeneous integration of die-to-die link interconnects within the same package. The UCIe standard allows for advanced package and standard package options to tradeoff cost, band... » read more

A Software-First Mindset for Driving Efficiency and Sustainability for Industrial IoT


Schneider Electric, Arm, and system integrators Witekio and Capgemini have produced a software-defined platform for industrial automation and energy management. The platform uses cloud-native techniques to create a flexible, energy-efficient reference design that uses virtualization to enable real-time, mixed-criticality services at the embedded edge. Read more here. » read more

Joint Interdisciplinary Work To Enable Novel, Industry-Ready Chiplet Solutions


Fraunhofer is going to establish the Chiplet Center of Excellence (CCoE), which is a unique research activity based on Fraunhofer‘s long experience and broad research portfolio in design, implementation and test of 2.5 and 3D integrated electronic systems. The Center aims at establishing a common understanding among the partners and at creating a suitable chiplet development methodology. This... » read more

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