Changing The Design Flow


Synopsys’ Michael Jackson talks with Semiconductor Engineering about why it’s becoming necessary to fuse together various pieces of digital design. https://youtu.be/AOWh4wjw-ps » read more

High-Speed SerDes At 7nm


eSilicon’s David Axelrad discusses the challenges with 56Gbps and 112Gps SerDes, and why the switch from analog to digital is required for performance and low power. https://youtu.be/E-CU8TLvjjc » read more

Will FPGAs Work As Expected?


OneSpin Solutions’ Muhammed Haque Khan, product specialist for synthesis verification, digs into equivalence checking in FPGA designs and what can go wrong with FPGA designs. https://youtu.be/RFlP2Z_-Yqs » read more

M2M’s Network Impact


Synopsys’ Manmeet Walia talks examines the impact of machine-to-machine traffic and why that requires some fundamental changes in networking architectures. Two key issues that need to be addressed are scalability and latency, which require new networking architectures. https://youtu.be/2RIQt3QVPtE » read more

ISO 26262 Statistics


Jorg Gosse, functional safety product manager at OneSpin Solutions, talks about the statistics behind the standards, what is considered good enough, and how those numbers vary across different standards. https://youtu.be/cNTFN3kQ-OM » read more

Emulation-Driven Implementation


Tech Talk: Haroon Choudry, director of Prime Power at Synopsys, talks about how to shorten time to market and increase confidence in advanced-node designs, while also reducing the amount of guard-banding and improving design freedom. https://youtu.be/xT3CIqjnaBk » read more

Tech Talk: Traceability In Functional Safety


Dominik Strasser, vice president of engineering at OneSpin Solutions, talks about the impact of functional safety regulations on liability and traceability in automotive, rail, industrial, nuclear and machinery applications. https://youtu.be/2jWnId8jQJg » read more

Tech Talk: FPGA RTL Checking


Tobias Welp, software architect and engineering manager at OneSpin Solutions, explains how to ensure the RTL created by design engineers matches what shows up in an FPGA. https://youtu.be/0N1PDYyq0dY » read more

Tech Talk: Improving Verification


Frank Schirrmeister, senior group director for product management and marketing at Cadence, discusses how to verify different use cases, focusing on software, low-power designs, connectivity, and a variety of end markets. https://youtu.be/gK-0vmIWxJs » read more

Tech Talk: Automotive Design


NetSpeed Systems CEO Sundari Mitra talks about how to speed up the design of automotive chips. https://youtu.be/cus4fStDa5c » read more

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