LBIST for auto MCUs using a digital twin; HW-SW co-design for side-channel protected NN inference; near-memory FPGA graph processing framework; AFM & photoresists; acceleration of DL inference on edge devices; negative capacitance GAA FETs.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| A Novel LBIST Signature Computation Method for Automotive Microcontrollers using a Digital Twin | University of Bremen, Infineon Technologies and DFKI GmbH |
| Hardware-Software Co-design for Side-Channel Protected Neural Network Inference | North Carolina State University and Intel |
| ACTS: A Near-Memory FPGA Graph Processing Framework | University of Virginia and Samsung |
| Enhancing the precision of 3D sidewall measurements of photoresist using atomic force microscopy with a tip-tilting technique | National Metrology Institute of Japan (NMIJ) and National Institute of Advanced Industrial Science and Technology (AIST) |
| Efficient Acceleration of Deep Learning Inference on Resource-Constrained Edge Devices: A Review | University of Missouri and Texas Tech University |
| Recent Developments in Negative Capacitance Gate-All-Around Field Effect Transistors: A Review | PKU-HKUST Shenzhen-Hong Kong Institution and Shenzhen Institute of Peking University |
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