Design Virtualization And Its Impact On SoC Design

How to find the quickly right combination of IP, foundation libraries, memory and operating conditions.

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At advanced technology nodes (40nm and below), the number of options that a system-on-chip (SoC) designer faces is exploding. Choosing the correct combination of these options can
have a dramatic impact on the quality, performance, cost and schedule of the final SoC. Using conventional design methodologies, it is very difficult to know
if the correct options have been chosen. There is simply no way to run the required number of trial implementations to ensure the best possible option choices.

This document outlines the strategic customer benefits of applying a new technology called design virtualization to optimize SoC designs. To read more, click here.