Ferroelectrics: The Dream Of Negative Capacitance

First in a series: Why FeFETs and ferroelectric memory are suddenly so interesting.


Ferroelectrics are getting a serious re-examination, as chipmakers look for new options to maintain drive current.

Ferroelectric materials can provide non-volatile memory, serving an important functional gap somewhere between DRAM and flash memory. Indeed, ferroelectrics for memory and 2D channels for transistors were two highlights of the recent IEEE Electron Device Meeting.

Ferroelectrics are interesting because they have a built-in electronic dipole. This dipole creates a remnant polarization, either P+ or P-. Applying a strong electric field — the coercive field, Ec — switches the polarization direction, and the new state persists after the field is removed (see Figure 1). Ferroelectric memories rely on this effect for non-volatile data storage.

Fig. 1: Ferroelectric polarization as a function of electric field. Source: Wikimedia

Fig. 1: Ferroelectric polarization as a function of electric field. Source: Wikimedia

Ferroelectric transistors are a bit more complicated. They assemble the gate capacitor from a ferroelectric layer (FE) placed in series with a conventional dielectric (DE). Switching the polarization of the FE decreases its charge, leading to a corresponding increase in charge at the DE near the gate. Relative to a conventional MOSFET, this so-called “negative capacitance” effect causes current to increase more rapidly relative to gate voltage, reducing the transistor’s subthreshold swing.

The subthreshold swing (SS), a measure of the steepness of a transistor’s switch from ON to OFF, is the change in voltage needed for a one decade increase in current. As transistors shrink, maintaining an adequate ratio between Ion and Ioff becomes more difficult. A sharper on/off transition is one path to reduced leakage current. Unfortunately, SS in conventional devices is constrained by the Boltzmann limit of about 60mV/decade.

FeFETs have been proposed as a potential solution to this problem. The literature describes these devices as both negative capacitance FETs (NCFETs) and FeFETs. (This report uses FeFETs exclusively.) Relative to more radical device architectures, like tunneling FETs, ferroelectric transistors closely resemble conventional MOSFETs. A 2011 demonstration of ferroelectric behavior in hafnium-zirconium oxide (HZO) capacitors showed that ferroelectric materials could be compatible with existing processes. ⁠[1]

What is negative capacitance, anyway?
The device physics behind negative capacitance is not fully understood. Since the negative capacitance effect was first proposed, researchers have been debating its exact nature. Is it simply a transient switching effect, or evidence of a potentially stable third polarization state?

Fig. 2: Free energy versus polarization. Source: K. Derbyshire/Semiconductor Engineering

Fig. 2: Free energy versus polarization. Source: K. Derbyshire/Semiconductor Engineering

The argument that negative capacitance is a potentially stable state rests on Landau’s analysis [3] of behavior near a phase transition, as illustrated in Figure 2. In between the stable P+ and P- states, this argument holds, there is a “neutral” configuration that can be maintained by interactions with a conventional dielectric. Controlling the negative capacitance effect in transistors requires accurate matching between the FE and DE layers.

The problem with this analysis, according to Jan Van Houdt, imec’s program director for ferroelectrics, is that the transition between the P+ and P- states corresponds to physical movement of ions in the ferroelectric unit cell. A chemical bond breaks and re-forms; there is no stable state intermediate between the two. Moreover, figure 2 is derived from the Landau-Devonshire model for steady state behavior in equilibrium conditions. Using an equilibrium model to describe switching behavior is inherently problematic.

Instead, discussions of switching dynamics need to consider the forces acting on the material. In the absence of an external field, each ferroelectric unit cell is an electronic dipole surrounded by other dipoles.[⁠4] In a single crystal the lowest energy state will be one in which all of the dipoles are aligned in the same direction. In HZO deposited on HfO2 or silicon, a more likely result is a polycrystalline material, with grain boundaries and somewhat random crystal orientations. The P+ direction for one grain may not align with the P+ direction of its neighbors. Depending on the deposition conditions, there may even be crystallites that are not ferroelectric at all. ⁠[5] The net polarization of the material is the sum of the P+ and P- domains.

When an electric field is applied, the dipoles begin to align themselves with it. Switching of individual dipoles is very fast — one of the fastest electronic switching mechanisms known — but not all domains in a multi-crystalline, randomly oriented film will switch at once. Shifting the net polarization from P+ to P- or vice versa requires a finite time period.

Optimizing subthreshold swing
While the switching is taking place, the change in polarization leads to a change in the net capacitance of the material. Maintaining a constant voltage requires an influx of charge from an external source: current flows. Huimin Wang and colleagues at Peking University explained that negative capacitance behavior thus occurs when the rate of change of the polarization is greater than the rate of change of the capacitance. ⁠[6] They observed the effect in standalone FE capacitors, indicating that the presence of a DE layer is not fundamental to the effect. When a ferroelectric is in series with a conventional dielectric, though, the interaction between the two will define the overall electrostatics of the device.

Fig. 3: Time evolution of the dynamic capacitance in a ferroelectric capacitor. Source: Creative Commons

Fig. 3: Time evolution of the dynamic capacitance in a ferroelectric capacitor. Source: Creative Commons

Even if there is no persistent negative capacitance state, it is possible to have negative differential capacitance. Depending on the sweep rate of the gate voltage, the net capacitance may increase sharply, then fall as the gate voltage “catches up” and Vth is reached. As shown in Figure 3, the change in capacitance is negative for part of the curve. However, practical devices face a conflict between subthreshold swing and hysteresis. As the Peking University group explained, a steeper SS requires a more rapid change in polarization (∂P/∂t) with time. Hysteresis, defined as the difference in the voltage across the ferroelectric (VFE) for forward and reverse switching, is a fundamental aspect of the material. Unfortunately, increasing ∂P/∂t increases VFE, and vice versa. That is, it is not possible to optimize hysteresis and subthreshold swing at the same time.

Whether ferroelectric behavior is relevant for commercial devices therefore remains an open question.

For memory, (to be discussed in Part II of this series), the answer seems to be unequivocally, yes. Rapid, persistent switching places ferroelectric memories in an important niche between flash memory and DRAM. For logic, though, the answer is less clear. While using negative capacitance to enhance MOSFET performance may not be possible, some 2D semiconductor materials also have ferroelectric characteristics. Part III in this series will consider what role ferroelectrics might play in advanced channel devices.


1. J. Müller, et. al., “Ferroelectric Zr0.5Hf0.5O2 thin films for nonvolatile memory applications”, Appl. Phys. Lett. 99, 112901 (2011) https://doi.org/10.1063/1.3636417
3. P. Chandra and P.B. Littlewood, “A Landau Primer for Ferroelectrics.” https://doi.org/10.48550/arXiv.cond-mat/0609347
4. Alam, M.N.K., Roussel, P., Heyns, M. et al. “Positive non-linear capacitance: the origin of the steep subthreshold-slope in ferroelectric FETs.” Sci Rep 9, 14957 (2019). https://doi.org/10.1038/s41598-019-51237-2
5. M. Dragoman, et. al., “The Rise of Ferroelectricity at Nanoscale: Nanoelectronics is rediscovering the ferroelectricity,” in IEEE Nanotechnology Magazine, vol. 15, no. 5, pp. 8-19, Oct. 2021, doi: 10.1109/MNANO.2021.3098217.
6. H. Wang et al., “New Insights into the Physical Origin of Negative Capacitance and Hysteresis in NCFETs,” 2018 IEEE International Electron Devices Meeting (IEDM), 2018, pp. 31.1.1-31.1.4, doi: 10.1109/IEDM.2018.8614504.

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