The impact of EUV on mask spend, increasing use of pellicles, and whether circular masks are on the horizon.
The eBeam Initiative’s 11th annual Luminaries survey in 2022 reported EUV fueling growth of the semiconductor photomask industry while a panel of experts cited a number of complications in moving to High-NA EUV during an event co-located with the SPIE Photomask Technology Conference in late September. Industry luminaries representing 44 companies from across the semiconductor ecosystem participated in this year’s survey. Aki Fujimura, CEO of D2S, Inc., the managing company sponsor of the eBeam Initiative, moderated the panel discussion about this year’s survey results. He was joined by Naoya Hayashi, DNP Honorary Fellow; Harry Levinson, Principal Lithographer at HJL Lithography; Ezequiel Russell, Senior Director of Mask Technology at Micron Technology; and Noriaki Nakayamada, Senior Technology Expert at NuFlare Technology. This is part one of the discussion.
Photo left to right: Aki Fujimura, Naoya Hayashi, Ezequiel Russell, Harry Levinson, Noriaki Nakayamada
Fujimura: The results of this year’s survey show a very bright outlook for multi-beam mask writing and EUV. Let’s look at EUV first. 78% of those surveyed said EUV masks would make a positive contribution to 2022 photomask revenues, shown in figure 1. Harry, EUV currently involves single patterning of the critical layers versus multiple patterning generating multiple masks for optical lithography. So why doesn’t that end up reducing mask revenues?
Fig. 1: Luminaries surveyed view EUV masks as a positive for mask revenues.
Levinson: Everything about EUV is more expensive. There are lots of reasons EUV masks are more expensive starting with the mask blank. I also think without pellicles, people make multiple masks. So even though it’s single patterning, you have multiple masks. But the EUV benefits are worth it – yield, cycle time, turnaround time (TAT). Suppose that we replace 10 layers triple-patterned with optical lithography with 10 single exposure EUV lithography steps. With 20 fewer lithography operations, reduction of thin film depositions, etches, and cleans, at 1.5 days between mask steps, total process time is reduced by nearly one month by using EUV lithography! Basically, EUV is “expensive but worth it.”
Russell: While EUV masks are more expensive, the additional resolution that EUV brings makes the ROI positive for a lot of companies at the leading edge. EUV mask lifetimes are shorter, so you order more of the same mask which increases the mask spend.
Hayashi-san: EUV mask production materials and process costs are quite high, contributing to cost of EUV masks. Mask blanks are expensive and EUV-specific quality assurance tools are needed.
Nakayamada-san: Defect mitigation adds to cost. You need more EUV mask blanks which increases the total mask revenue.
Levinson: So, EUV just costs more, and it’s worth it because of improvement in wafer quality.
Fujimura: What about the EUV mask challenges – have they been solved for 0.33 NA? Let’s talk about pellicles first. In figure 2, luminaries surveyed think EUV pellicle usage is trending up.
Fig. 2: Luminaries surveyed see increasing use of EUV pellicles.
Hayashi-san: Pellicles are currently not a problem because we already know EUV pellicles are in high-volume manufacturing. Okay for now but of course improvements are always needed.
Levinson: Whether to use an EUV pellicle is a decision each company must make, trading off between loss of transmission and yield. Michael Lercel from ASML presented a very good paper on this topic a few years ago. For memories, you can take the risk of defects but for logic, pellicles are a good thing. People seem to be following Lercel’s logic.
Fujimura: EUV mask inspection has been a challenge, but the Luminaries remain confident again this year in EUV actinic inspection with 69% agreeing that it will be used in 2023 for HVM, shown in figure 3. What changed from last year’s survey is the agreement on eBeam mask inspection, which is down to 24% from 42% last year.
Fig. 3: Luminaries surveyed have confidence in actinic EUV inspection.
Hayashi-san: I think actinic could be taking attention away from eBeam inspection. In future, High-NA EUV may need more resolution. Even actinic inspection may reach a resolution limit. eBeam inspection could be one of the candidates for High-NA EUV.
Fujimura: Let’s talk about High-NA EUV. New questions in this survey indicate that while High-NA EUV first usage could be by 2026, it will take until 2027 and beyond for broad HVM by more than one company (figure 4). Harry, you’re on the IEEE International Roadmap for Devices and Systems (IRDS). What’s the IRDS roadmap counting on?
Fig. 4: Luminaries answered new questions about High-NA EUV.
Levinson: Insertion is largely dependent on ASML’s timeline. Can’t be faster than ASML’s timeline which is early 2025. But for high-volume manufacturing, you have to have multiple tools up and operational. When you look at multiple companies, it would be difficult to see more than one company by 2026 but by 2027, I think we could see a lot of activity in wafer fabs.
Fujimura: Ezequiel, I imagine you’re saying “we’re busy with .33” but any thoughts on High-NA EUV? When did you say it’d be broadly used by more than one company?
Russell: For memory applications it may be a little different than logic. First, we will push .33 EUV to the resolution limit. For High-NA, it’s not clear it will provide enough ROI for insertion because of other scaling difficulties. It may require a different architecture to overcome. So High-NA EUV may not be as attractive for memory makers. It will depend on when it’s available and when it’s cost effective for memory makers to transition.
Fujimura: What are the mask challenges for High-NA EUV?
Hayashi-san: The big difference for High-NA mask is the anamorphic optics which is 8x magnification in the Y direction and 4x in the X direction. This decision was made explicitly so that the existing mask infrastructure works. Maybe a challenge is the more critical specifications in the 4x direction, or both directions.
Fujimura: What about the perspective from a mask writer, Nakayamada-san?
Nakayamada-san: There is a good opportunity to align the writers to match a looser spec in the Y direction. Even though the spec doesn’t change, it will still work.
Fujimura: What about circular masks? It’s related to High-NA. What’s the basic idea, Harry?
Levinson: When you go to the anamorphic optics with 8x and 4x magnification, and you keep the mask the same size, it’s problematic on the wafer as the field size is only half of what we’re used to. Then you must utilize techniques like stitching which isn’t a trivial thing. What you really need is a bigger mask. I believe Intel made the observation if you could make your mask on 300mm round substrates, it’s a familiar task. There are a lot of things that would need to be checked with circular masks. Would you have to modify the reticle stage in the scanner? Otherwise, I think it’s a good proposal and worth looking at a lot more closely.
Hayashi-san: We tried round-shaped masks in the past, a long time ago. Can the mask writer handle it? Writing uniformly across a bigger field is probably a challenge. Technology-wise, circular masks are a good idea but not sure it’s a good business idea. A merchant mask house doesn’t have a 300mm process tool so that’s kind of a big challenge for us!
Fujimura: Nakayamada-san, can the mask writers do that? Isn’t that a big change?
Nakayamada-san: The problem would be if a customer requests an interchangeable stage writing a square six-inch mask at the same time they want to write a circular 300mm mask.
Russell: I agree with the panel that from a technology point of view, it’s feasible and it makes sense since we already have the 300mm machines in the wafer fabs. But I see this as a problem for mask shops. They don’t want to maintain dual equipment for regular six-inch masks as well as for circular masks. I don’t know how many nodes High-NA EUV will support and how many layers per node, so we may be talking about a small number of masks. Changing the infrastructure for just a few nodes may not make economic sense.
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