Modeling Semiconductor Process Variation

How to model cross wafer die-to-die variations using virtual fabrication.


3D semiconductors, 3D NAND Flash, FinFETS and other advanced devices are bringing tremendous opportunities to the semiconductor industry. Unfortunately, these devices are also bringing new design, process and production problems. Process variability has been a major contributor to production delays as feature sizes have decreased and process complexity has increased. Virtual fabrication is a computerized technique to perform predictive, three dimensional modeling of semiconductor fabrication processes. Virtual fabrication allows engineers to test semiconductor process changes and process variability in minutes or hours, instead of the weeks or months required to test their designs using actual semiconductor wafers. This white paper explores the modeling of cross wafer die-to-die semiconductor process variations using virtual fabrication techniques available in SEMulator3D.

To read more, click here.

Leave a Reply

(Note: This name will be displayed publicly)