Week In Review: Auto, Security, Pervasive Computing


Synopsys announced an electronic and photonic co-design platform for photonic integrated circuit (PIC) design, layout implementation, and verification. The OptoCompiler provides schematic-driven layout and advanced photonic layout synthesis in the same platform. AI Rambus says it clocked 4.0 Gbps on its HBM2E memory interface (PHY and controller), which is a desirable speed for AI/ML traini... » read more

AI & IP In Edge Computing For Faster 5G And The IoT


Edge computing, which is the concept of processing and analyzing data in servers closer to the applications they serve, is growing in popularity and opening new markets for established telecom providers, semiconductor startups, and new software ecosystems. It’s brilliant how technology has come together over the last several decades to enable this new space starting with Big Data and the idea... » read more

Is DVFS Worth The Effort?


Almost all designs have become power-aware and are being forced to consider every power saving technique, but not all of them are yielding the expected results. Moreover, they can add significant complexity into designs, increasing the time it takes to get to tapeout and boosting up the cost. Dynamic voltage and frequency scaling (DVFS) is one such power and energy saving technique now being... » read more

Dealing With Device Aging At Advanced Nodes


Premature aging of circuits is becoming troublesome at advanced nodes, where it increasingly is complicated by new market demands, more stress from heat, and tighter tolerances due to increased density and thinner dielectrics. In the past, aging and stress largely were separate challenges. Those lines are starting to blur for a number of reasons. Among them: In automotive, advanced-node... » read more

Blog Review: Sept. 9


Mentor's Jacob Wiltgen considers the recent advances in safety critical engineering and how automated the lifecycle can become, where tools form a set of checks and balances to ensure the accuracy of results. Cadence's Paul McLellan finds out what's new at TSMC, including a new R&D center, fab construction, capacity increases for existing nodes, and what the company sees for beyond its N... » read more

Early Verification Of Multi-Cycle Paths And False Paths In Simulation


Timing closure is a critical step in the chip development process. The performance and timing of a design must be verified, and any violations must be investigated and resolved. This includes the specification and verification of timing exceptions. This white paper focuses on false paths and multi-cycle paths, the use of Synopsys Design Constraints (SDC) to specify these exceptions, and the “... » read more

Formal Verification Becoming Critical To Auto Security, Safety


Formal verification is poised to take on an increasingly significant role in automotive security, building upon its already widespread use in safety-critical applications. Formal has been essential component of automotive semiconductor verification for some time. Even before the advent of ADAS and semi-autonomous vehicles — and functional safety specifications like ISO 26262 and cybersecur... » read more

New Data Format Boosts Test Analytics


Demand for more and better data for test is driving a major standards effort, paving the way for one of most significant changes in data formats in years. There is good reason for this shift. Data from device testing is becoming a critical element in test program decisions regarding limits and flows. This is true for everything from automotive and medical components to complex, heterogeneous... » read more

Week In Review: Design, Low Power


Tools & IP Arm unveiled the Cortex-R82, a 64-bit, Linux-capable Cortex-R processor targeted for next-generation enterprise and computational storage solutions. The Cortex-R82 provides 2x performance depending on workload compared to previous Cortex-R generations and provides access of up to 1TB of DRAM for advanced data processing in storage applications. It offers an optional memory manag... » read more

Week In Review: Auto, Security, Pervasive Computing


AI on edge Cadence’s Tensilica Vision P6 DSP IP will be in Kneron’s KL720, a 1.4TOPS AI system-on-chip (SoC) targeted for AI of things (AIoT), smart home, smart surveillance, security, robotics and industrial control applications. Arm announced its Arm Cortex-R82, a 64-bit, Linux-capable Cortex-R processor for enterprise and computational storage systems. The processor is designed to pr... » read more

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