Upgrade Your SoC Design With USB4 IP


USB4 is a new standard of connectivity by the USB Implementers Forum (USB-IF). USB4 supports multiple high-speed interface protocols, including USB4, DisplayPort, PCI Express, and Thunderbolt 3 for efficient data transfer and simultaneous delivery of data, power, and high-resolution video through a single USB Type-C cable. USB4 offers up to 40Gbps, which is twice that of the preceding USB 3.2 G... » read more

Week In Review: Auto, Security, Pervasive Computing


Pervasive computing — data center, edge, IoT Codasip and Metrics Design Automation announced they have integrated Metrics’ SystemVerilog RTL Simulation Platform within Codasip’s SweRV Core Support Package, version, and it will be accessible on the cloud. Aldec’s TySOM Embedded Development Kits have qualified for Amazon Web Services (AWS) IoT Greengrass. TySOM is a family of Xilinx Z... » read more

Virtualization In The Car


As the automotive industry grapples with complexity due to electrification and increasing autonomy of vehicles, consolidation of ECUs within vehicles, more stringent safety and security requirements, automotive ecosystem players are looking to virtualization concepts in a number of ways to realize the vehicles of tomorrow. One way is with hardware virtualization; the ability of a device such... » read more

WiFi Evolves For The IoT


WiFi is everywhere, and it’s the most prevalent of the communication protocols that use unlicensed spectrum. But as a common protocol for the Internet of Things (IoT), it faces challenges both because of congestion and the amount of energy it consumes. Two new approaches aim to address those concerns. One is to use multiple channels at once. The second involves the new 802.11ah HaLow stand... » read more

Blog Review: Aug. 5


Rambus' Scott Best explains some more sophisticated chip attacks, such as side-channel attacks, clocking attacks, fault injection, and infrared emission analysis, and countermeasures that can be adopted against them. Arm's Mark O'Connor considers ways that deployed neural networks could adapt to examples it sees in real-world use and generate more accurate predictions. Mentor's Chris Spea... » read more

Problems And Solutions In Analog Design


Advanced chip design is becoming a great equalizer for analog and digital at each new node. Analog IP has more digital circuitry, and digital designs are more susceptible to kinds of noise and signal disruption that have plagued analog designs for years. This is making the design, test and packaging of SoCs much more complicated. Analog components cause the most chip production test failures... » read more

USB4: User Expectations Drive Design Complexity


This white paper outlines the capabilities of USB4 Hosts, Hubs, Docks, and Devices with an emphasis on how end-user expectations drive the complexity of USB4 products. USB4 is the most complex USB specification so far and requires designers to understand the USB4, USB 3.2, USB 2.0, USB Type-C, and the USB Power Delivery specifications. Designers must also understand PCIe and DisplayPort specifi... » read more

Creating Better Models For Software And Hardware Verification


Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; Nasr Ullah, senior director of performance architecture at SiFive. What follows are excerpt... » read more

EDA Forms The Basis For Designing Secure Systems


By Adam Cron and Brandon Wang As Internet of Things (IoT) devices rapidly increase in popularity and deployment, security risks are arising at all levels. It could be at the usability level such as social engineering, pretexting, phishing; at the primitive level such as cryptanalysis; at the software level such as client-side scripting, code injection; and now even at the hardware level. Dur... » read more

The Evolution Of Digital Twins


Digital twins are starting to make inroads earlier in the chip design flow, allowing design teams to develop more effective models. But they also are adding new challenges in maintaining those models throughout a chip's lifecycle. Until a couple of years ago, few people in the semiconductor industry had even heard the term "digital twin." Then, suddenly, it was everywhere, causing confusion ... » read more

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