tag: Applied Materials

The Week In Review: July 15
By Mark LaPedus - 15 Jul, 2013 - Comments: 0

By Mark LaPedus There are more problems surfacing with extreme ultraviolet (EUV) lithography. Yes, the light source remains a problem, but the resists appear to be in decent shape. “The next challenge is the mask blank,” said Stefan Wurm, director of Sematech’s lithography program. The new problem involves ion beam deposition, which apparently is causing defects and overfill on EUV masks... » read more

New Approaches To Better Performance And Lower Power
By Ed Sperling - 11 Jul, 2013 - Comments: 0

By Ed Sperling Until 90nm, every feature shrink and rev of Moore’s Law included a side benefit of better power and performance. After that, improvements involved everything from different back-end processes to copper interconnects and transistor structures. But from 20nm onward, the future will rest with a combination of new materials, new architectures and new packaging approaches—and som... » read more

Speeding Up NMOS
By Ed Sperling - 08 Jul, 2013 - Comments: 0

By Ed Sperling For years—decades, in fact—the NMOS transistor world has been on cruise control. NMOS is naturally faster and its performance has scaled better than PMOS. PMOS has had a cost advantage. But lately, it has been catching up in performance, too. In fact, at 20nm the two transistor types have proven nearly equal in performance—but not for long. NMOS is about to get a big bo... » read more

Medical Drives Boom In MEMS
By Ed Sperling - 20 Jun, 2013 - Comments: 0

By Mark LaPedus At a recent event, an executive from a startup called Proteus Digital Health described the medical benefits of swallowing the company’s ingestible sensors or digital pills. First, a consumer would swallow Proteus Digital’s tiny ingestible sensor, along with one’s current medication. With no battery or antenna, the stomach fluid generates the power in the ingestible sen... » read more

Inside A 450mm Metrology Consortium
By Mark LaPedus - 20 Jun, 2013 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss 450mm metrology challenges with Menachem Shoval, a former manufacturing executive at Intel and chairman of the Metro450 consortium. The Israeli-based consortium is developing metrology technology for the next-generation, 450mm wafer size. The group consists of Intel, Applied Materials, Jordan Valley, Nanomotion, Nov... » read more

Merchant Photomask Makers Remain Relevant
By Jeff Chappell - 20 Jun, 2013 - Comments: 0

By Jeff Chappell For many years the trend in the semiconductor industry with regard to photomasks and chipmakers was to shed captive mask operations in favor of merchant photomask suppliers. This reflected a larger trend all along the supply chain with many companies moving away from vertical integration as, consequently, the foundry model grew. "This was mainly driven by cost consideratio... » read more

Consortium Mania Sweeps 450mm Landscape
By Mark LaPedus - 20 Jun, 2013 - Comments: 0

By Mark LaPedus In the mid-1990s, the semiconductor industry embarked on a costly and problematic migration from 200mm to 300mm wafer fabs. At the time, the 300mm development efforts were in the hands of two groups—Sematech and a Japanese-led entity. The equipment industry was on the outside looking in. And as a result, the migration from 200mm to 300mm fabs was out of sync and a nightma... » read more

Overcoming Shallow Trench Isolation
By Kathryn Ta - 20 Jun, 2013 - Comments: 0

By Kathryn Ta To prevent electrical current leaking between adjacent transistors, state-of-the-art microchips feature shallow trench isolation (STI) to isolate transistors from each other. Key steps in the STI process involve etching a pattern of trenches in the silicon, depositing dielectric materials to fill the trenches, and removing the excess dielectric using technologies such as chemical... » read more

Extending Copper Interconnect Beyond The 14nm Node
By Various Writers - 20 Jun, 2013 - Comments: 0

Fabricating interconnects is one of the most process-intensive and cost-sensitive parts of manufacturing. To find out more about what's changing in this area and why it's so important, click here. » read more

3D NAND Market Heats Up
By Mark LaPedus - 16 May, 2013 - Comments: 0

By Mark LaPedus It’s the tale of two promising and separate 3D chip architectures. One technology is slowly taking root, while the other one is heating up. 3D stacked-die using through-silicon vias (TSVs) is on the slower path. Advanced chip-stacking has several challenges and is still a few years away from mass production. In contrast, 3D NAND is heating up, as Samsung and SK Hynix are a... » read more

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