Power/Performance Bits: Feb. 26

Integrated RRAM for edge AI
Researchers at CEA-Leti and Stanford University have developed the first circuit integrating multiple-bit non-volatile Resistive RAM (RRAM) with silicon computing units, as well as new memory resiliency features that provide 2.3-times the capacity of existing RRAM.

The proof-of-concept chip monolithically integrates two heterogeneous technologies: 18KB of on-chip RRAM on top of commercial 130nm silicon CMOS with a 16-bit general-purpose microcontroller core with 8KB of SRAM.

According to the team, the new chip delivers 10-times better energy efficiency (at similar speed) versus standard embedded FLASH, due partly to ultra-fast and energy-efficient transitions from on mode to off mode and vice versa. Additionally, the 2.3 bits/cell RRAM design enables higher memory density yielding 2.3x better neural network inference accuracy, for example, compared to a 1-bit/cell equivalent memory.

To counter write failures common to NVM, the team created a technique called ENDURER, an endurance mitigation mechanism that includes a coherent write buffer and periodic remapping algorithm, that should give the chip a 10-year functional lifetime.

Target applications include energy-efficient, smart-sensor nodes to support AI on IoT edge devices. The technology was presented on Feb. 19, at the International Solid-State Circuits Conference (ISSCC) 2019 in a paper titled, “A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques”.

Calculating EM noise
Researchers at Osaka University developed an algorithm for numerical calculation of electromagnetic (EM) noise in electric circuits.

The algorithm developed is for computer simulation of electric circuits in which transmission lines are connected with lumped element models. According to the team, the solution of problems along a transmission line is typically performed using partial differential equations, while the solution of problems in a lumped constant circuit uses ordinary differential equations. In order to connect these two different differential equations and solve these problems, the researchers introduced the incidence matrix found in circuit theory and time domain impedance.

The team says that previously, this solution required a method to replace lumped constant circuits with transmission lines, but this new method does not require such a replacement, allowing for more practical calculations.

Based on the results of calculations using this algorithm, the researchers demonstrated that EM noise could be reduced by using the symmetric 3-line configuration of the circuit. Their calculation method is for one-dimensional multi-conductor transmission lines, but they have already developed a patent pending calculation algorithm in two- and three-dimensional multi-conductor transmission lines as well.

“Eventually, we aim to develop an ‘EM noise-less infrastructure.’ In addition to improving device performance, we’d like to realize a society in which people can use high value-added equipment, such as equipment with ultra-low power consumption and ultra-low waste heat,” said Masayuki Abe, a professor at Osaka. “Specifically, we will theoretically clarify a noiseless structure of electronic circuits and demonstrate that drastic reduction of EM noise can lead to a breakthrough that allows for low power consumption.”

Hiroshi Toki, professor at Osaka, adds, “Our goal is to use our method to develop advanced technology into general purpose technology and establish guidelines for developing the concept of noiseless electronic devices into projects with both social and economic impact.”

In addition to analysis of time and frequency domains of EM noise, their algorithm could be used for various applications, such as generation of heat by noise, metamaterials, and antenna analysis.

Autonomous fines
Is now the time to think about levying fees on autonomous vehicles? A researcher at the University of California, Santa Cruz thinks so, before they become commonplace.

The particular focus is autonomous taxis cruising highly congested downtown streets while waiting for passengers, slowing down the rest of traffic rather than paying parking fees.

“Parking prices are what get people out of their cars and on to public transit, but autonomous vehicles have no need to park at all. They can get around paying for parking by cruising,” argues Adam Millard-Ball, an associate professor of environmental studies at UCSC. “They will have every incentive to create havoc.”

Under the best-case scenario, the presence of as few as 2,000 self-driving cars in downtown San Francisco will slow traffic to less than 2 miles per hour, according to Millard-Ball, who uses game theory and a traffic micro-simulation model to generate his predictions.

“Even when you factor in electricity, depreciation, wear and tear, and maintenance, cruising costs about 50 cents an hour–that’s cheaper than parking even in a small town,” said Millard-Ball. “Unless it’s free or cheaper than cruising, why would anyone use a remote lot?”

While congestion pricing, which charges a flat fee to drive in or enter a city center, has proven an effective way to regulate pollution and congestion, it’s a politically difficult move. Which is why Millard-Ball is arguing for AV regulation now.

“As a policy, congestion pricing is difficult to implement. The public never wants to pay for something they’ve historically gotten for free,” he said. “But no one owns an autonomous vehicle now, so there’s no constituency organized to oppose charging for the use of public streets. This is the time to establish the principle and use it to avoid the nightmarish scenario of total gridlock.”