Rediscovering Coverage Insurance

When coverage comes up in conversation, if it comes up at all, it’s always a matter of car, home or health insurance. Coverage and functional verification are unlikely to be used in that discussion, or any other for that matter.

That’s too bad because engineering groups grapple with when is enough verification enough, like some kind of coverage insurance. Oh sure, simulation and emulation are used exhaustively, then formal verification’s cavalry comes in –– property checking to find corner-case bugs and establish exhaustive proof. And still engineers wonder how much more coverage insurance is needed?

The coverage concern is building with the advent of self-learning, driverless cars and low-power IoT systems that put huge demands on engineering groups for high-quality and thorough verification whether it’s for safety or security or power. Otherwise, a single bug in a production IC becomes expensive to fix and can cause catastrophic product failure in the field.

Block-level verification makes use of complex stimulus systems across multiple batch-mode simulation runs. Even so, it’s often hard to get verification closure. In another example of insufficient coverage, random stimulus methods and the Unified Verification Methodology (UVM) improve the ability to produce effective test vectors with a penalty –– a complex verification environment. UVM simulation doesn’t set up complex scenarios effectively to ensure that all block functionality is tested, causing a decelerating, asymptotic coverage progress curve that rarely reaches 100%.

It’s time for a different insurance policy, which extends coverage by leveraging comprehensive assertion-based verification. Engineering groups are insuring themselves with metric-driven verification –– formal assertion-based verification including formal code coverage analysis that integrates with simulation coverage results.

Better coverage insurance can come from combining formal verification and simulation as well. Because a formal verification tool maintains the entire state-space of the block under test, the complexity of creating certain test scenarios is reduced. Assertions are used to express functional properties to be proven or disproven, and the most complex scenarios are fully investigated.

One insurance policy analyzes the verification test plan to understand which test scenarios are better served by simulation with UVM testbenches and those that benefit from formal verification using assertions. The tools are applied as appropriate and coverage information collected to understand overall progress. Using this two-pronged approach, complex scenarios are analyzed earlier in the process and bug free-coverage is achieved faster.

The final piece of an extended coverage insurance policy requires high-quality formal verification to execute a variety of scenarios in a reasonable timescale with the entire block under test. Policy holders look for highly optimized formal models and a broad range of formal algorithms to ensure the design is tested quickly and efficiently. They also look for formal verification tools that contain advanced debug and ease-of-use features to simplify tracking and debugging.

All told, insurance for functional verification coverage is not dissimilar from a homeowner’s insurance policy. Don’t leave home or tape out your chip without it!