Ensuring Functional Safety In Design


Mohammed Abdelwahid (Ali), automotive logic test product manager at Mentor, a Siemens Business, discusses how to maximize coverage in the different ASIL standards for logic BiST, how to make testing more efficient, and what impact that has on area and test time. » read more

Ensuring Coverage In Large SoCs


Sven Beyer, product manager for design verification at OneSpin Solutions, talks about why formal technology is required to ensure coverage in some of the newest chips, how it deals with potential interactions and different use cases, and why it is gaining traction in automotive applications. » read more

Three Steps To Faster Low Power Coverage Using UPF 3.0 Information Models


Controlling power has its costs. The added power elements and their interactions make verification of low-power designs much more difficult and the engineer’s job overwhelmingly complex and tedious. Early versions of the Unified Power Format (UPF) provided some relief, but lacked provisions for a standardized methodology for low-power coverage. Ad hoc approaches are error prone and highly ... » read more

Using Static Analysis For Functional Safety


Fadi Maamari, group director for R&D at Synopsys, explains why static analysis is suddenly in demand in auto chip design, how it can help to choose the best implementation of functional safety approaches, and where it fits into the design flow. » read more

Portable Stimulus And Digital Twins


It has been a year since Accellera's Portable Test and Stimulus Specification became a standard. Semiconductor Engineering sat down to discuss the impact it has had, and the future direction of it, with  Larry Melling, product management director for Cadence; Tom Fitzpatrick, strategic verification architect for Mentor, a Siemens Business; Tom Anderson, technical marketing consultant for OneSp... » read more

Abstract Verification


Verification relies on a separation of concerns. Otherwise the task has no end. Sometimes we do it without thinking, but as an industry, we have never managed to fully define it such that it can become an accepted and trusted methodology. This becomes particularly true when we bring abstraction into the picture. A virtual prototype is meant to be true to behavior, but there could be timing d... » read more

Seeing Is Believing: Visualizing Full Coverage Closure In Low-Power Designs


By Madhur Bhargava and Durgesh Prasad Lowering the power consumption and leakage in SoCs and other electrical designs has become a paramount concern in recent years. The reasons for this are many and well understood. The structures and techniques we use to accomplish this have made verification of so called low-power designs more complex and difficult than it is for designs where power usage... » read more

Disregard Safety And Security At Your Own Peril


Semiconductor Engineering sat down to discuss industry attitudes towards safety and security with Dave Kelf, chief marketing officer for Breker Verification; Jacob Wiltgen, solutions architect for functional safety at Mentor, a Siemens Business; David Landoll, solutions architect for OneSpin Solutions; Dennis Ciplickas, vice president of characterization solutions at PDF Solutions; Andrew Dauma... » read more

Blog Review: June 5


Mentor's Neil Johnson argues that coverage closure shouldn't have to be mad scramble in the home stretch of development if designers change their early development mindset. In a video, Cadence's Amol Borkar explains Simultaneous Localization and Mapping, or SLAM, from the creation of a map of an unknown environment and understanding the orientation of a camera in this space. Synopsys' Tay... » read more

Evolution Of Verification Engineers


Semiconductor Engineering sat down to discuss the implications of having an executable specification that drives verification with Hagai Arbel, chief executive officer for VTool; Adnan Hamid, chief executive office for Breker Verification; Mark Olen, product marketing manager for Mentor, a Siemens Business; Jim Hogan, managing partner of Vista Ventures; Sharon Rosenberg, senior solutions archit... » read more

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