tag: 1.5nm

Controlling Variability And Cost At 3nm And Beyond
By Ed Sperling - 22 May, 2019 - Comments: 1

Richard Gottscho, executive vice president and CTO of Lam Research, sat down with Semiconductor Engineering to talk about how to utilize more data from sensors in manufacturing equipment, the migration to new process nodes, and advancements in ALE and materials that could have a big impact on controlling costs. What follows are excerpts of that conversation. SE: As more sensors are added int... » read more

Power Budgets At 3nm And Beyond
By Ed Sperling - 14 Mar, 2019 - Comments: 0

There is high confidence that digital logic will continue to shrink at least to 3nm, and possibly down to 1.5nm. Each of those will require significant changes in how design teams approach power. This is somewhat evolutionary for most chipmakers. Five years ago there were fewer than a handful of power experts in most large organizations. Today, everyone deals with power in one way or another... » read more

Samsung Unveils Scaling, Packaging Roadmaps
By Ed Sperling - 24 May, 2017 - Comments: 5

Samsung Foundry unveiled an aggressive roadmap that scales down to 4nm, and which includes a fan-out wafer-level packaging technology that bridges chips in the redistribution layer, 18nm FD-SOI, and a new organizational structure that allows the unit much greater autonomy as a commercial enterprise. The moves put [getentity id="22865" e_name="Samsung Foundry"] in direct competition with [get... » read more

Extending EUV Beyond 3nm
By Ed Sperling - 18 May, 2017 - Comments: 10

Jan van Schoot, senior principal architect at [getentity id="22935" comment="ASML"], sat down with Semiconductor Engineering to talk about how far EUV can be extended and where it is today. What follows are excerpts of that discussion. SE: High numerical aperture [gettech id="31045" comment="EUV"] has been in the works for some time as a way of extending EUV. How is this technology shaping... » read more

Moving Electrons Is Getting Harder
By Ed Sperling - 13 Aug, 2015 - Comments: 1

Numerous executives across the ecosystem—from EDA and equipment companies to foundries—recently have stated that Moore's Law has at least 10 more years of life. This is interesting math, considering the semiconductor industry is now working on 10nm, with chips expected to roll out next year. So given that Moore's Law is on a two-year cadence of doubling the number of transistors every 24... » read more

New Patterning Paradigm?
By Mark LaPedus - 16 Apr, 2015 - Comments: 0

Chip scaling is becoming more difficult at each process node, but the industry continues to find new and innovative ways to solve the problems at every turn. And so chipmakers continue to march down the various process nodes. But the question is for how much longer? In fact, at 16nm/14nm and beyond, chipmakers are finding new and different challenges, which, in turn, could slow IC scaling or br... » read more

EUV Still Matters…But Less
By Ed Sperling - 16 Oct, 2014 - Comments: 0

For all the chatter and occasional tirades about EUV missing its market window—it's true, EUV will have missed five market windows by 10nm—it still matters. And the sooner EUV hits the market with a viable power source, the better off the entire semiconductor manufacturing industry will be. But even EUV is a sideshow to some important shifts underway in technology. While technologically ... » read more

Will 7nm And 5nm Really Happen?
By Mark LaPedus - 19 Jun, 2014 - Comments: 11

As leading-edge chipmakers continue to ramp up their 28nm and 20nm devices, vendors are also updating their future technology roadmaps. In fact, IC makers are talking about their new shipment schedules for 10nm. And GlobalFoundries, Intel, Samsung and TSMC are narrowing down the options for 7nm, 5nm and beyond. There is a high probability that IC makers can scale to 10nm, but vendors face a ... » read more

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