tag: 2.5D

True 3D Is Much Tougher Than 2.5D
By Brian Bailey - 23 Mar, 2023 - Comments: 0

Creating real 3D designs is proving to be much more complex and difficult than 2.5D, requiring significant innovation in both technology and tools. While there has been much discussion about 3D designs, there are multiple interpretations about what 3D entails. This is more than just semantics, however, because each packaging option requires different design approaches and technologies. And a... » read more

The Race Toward Mixed-Foundry Chiplets
By Ann Mutschler - 23 Mar, 2023 - Comments: 1

Creating chiplets with as much flexibility as possible has captured the imagination of the semiconductor ecosystem, but how heterogeneous integration of chiplets from different foundries will play out remains unclear. Many companies in the semiconductor ecosystem are still figuring out how they will fit into this heterogeneous chiplet world and what issues they will need to solve. While near... » read more

Taming Corner Explosion In Complex Chips
By Brian Bailey - 23 Feb, 2023 - Comments: 0

There is a tenuous balance between the number of corners a design team must consider, the cost of analysis, and the margins they insert to deal with them, but that tradeoff is becoming a lot more difficult. If too many corners of a chip are explored, it might never see production. If not enough corners are explored, it could reduce yield. And if too much margin is added, the device may not be c... » read more

Improving Performance And Power With HBM3
By Andy Patrizio - 30 Jan, 2023 - Comments: 0

HBM3 swings open the door to significantly faster data movement between memory and processors, reducing the power it takes to send and receive signals and boosting the performance of systems where high data throughput is required. But using this memory is expensive and complicated, and that likely will continue to be the case in the short term. High Bandwidth Memory 3 (HBM3) is the most rece... » read more

Choosing The Correct High-Bandwidth Memory
By Ann Mutschler - 25 Jan, 2023 - Comments: 0

The number of options for how to build high-performance chips is growing, but the choices for attached memory have barely budged. To achieve maximum performance in automotive, consumer, and hyperscale computing, the choices come down to one or more flavors of DRAM, and the biggest tradeoff is cost versus speed. DRAM remains an essential component in any of these architectures, despite years ... » read more

The March Toward Chiplets
By Ed Sperling and Karen Heyman - 15 Dec, 2022 - Comments: 0

The days of monolithic chips developed at the most advanced process nodes are rapidly dwindling. Nearly everyone working at the leading edge of design is looking toward some type of advanced packaging using discrete heterogeneous components. The challenge now is how to shift the whole chip industry into this disaggregated model. It's going to take time, effort, as well as a substantial reali... » read more

Holistic Die-to-Die Interface Design Methodology For 2.5-D Multi-Chip-Module Systems
By Fraunhofer IIS/EAS - 07 Dec, 2022 - Comments: 0

More than Moore technologies can be supported by system level diversification enabled by chiplet based integrated systems within multi-chip-modules (MCM) and silicon interposer based 2.5D systems. The division of large system-on-chip dies into smaller chiplets with different technology nodes specific to the chiplet application requirement enables the performance enhancement at system level whil... » read more

Is UCIe Really Universal?
By Brian Bailey - 22 Nov, 2022 - Comments: 3

Chiplets are rapidly becoming the means to overcome the slowing of Moore's Law, but whether one interface is capable of joining them all together isn't clear yet. The Universal Chiplet Interconnect Express (UCIe) believes it will work, but some in the industry remain unconvinced. At least part of the problem is that interconnect standards are never truly finished. Even today, the protocols tha... » read more

Mastering FOWLP And 2.5D Design Is Easier Than You Think
By Bill Acito - 22 Nov, 2022 - Comments: 0

IC packaging has come into its own, where once traditional packaging was a “necessary evil,” today’s packaging can add significant value. There is an increase in functional density and flexibility by providing a platform for heterogeneous design assembly. Where designs implemented in an SoC can become too large to yield satisfactorily and too difficult to implement on one process node, pa... » read more

What’s So Different About Interposer Signal Integrity?
By Kelly Damalou - 28 Oct, 2022 - Comments: 0

By Kelly Damalou and Pete Gasperini To achieve gains in power, performance, area, and cost, 3D-IC architectures are pushing electronics design to new limits. Silicon integration technology and associated devices have undergone an impressive evolution over the last several decades. Their development encourages technological advancement in applications like high-performance computing, Artificial... » read more

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