Week 13: Cruising The Deep Submicron


These cooler, shorter days can only mean one thing: It’s time to get in the last beautiful late summer, early autumn motorcycle rides. Surprised? Well, I ride a 2005 Harley Davidson Dyna Low Rider. I’m a picky rider who prefers the kind of perfect weather conditions that have prevailed in Oregon during the last few weekends. Here is a little clip from a recent tour around Crater Lake in sou... » read more

Plotting IBM Micro’s Future


It’s been a wild ride for IBM’s Microelectronics Group. Neither IBM, nor the other parties involved, have made any public comments about the recent events concerning IBM Micro. Much of the drama has played out in the media. Based on those reports, here’s a rough outline of the events. Not long ago, IBM put its loss-ridden chip unit on the block to shore up the company’s bottom lin... » read more

Executive Insight: Taher Madraswala


Semiconductor Engineering sat down with Taher Madraswala, president of Open-Silicon, to talk about future challenges, opportunities and changes. What follows are excerpts of that interview. SE: What worries you most? Madraswala: What worries me at the industry-level is the growing effect that business constraints are having on product innovation. We’ve done a very good job of advancing ... » read more

What Happened To 450mm?


By Mark LaPedus, Ed Sperling & Katherine Derbyshire There was a time not very long ago—one process node, in fact—when the economic momentum of Moore’s Law seemed unstoppable with a combination of extreme ultraviolet lithography, larger wafer sizes and a variety of new materials. Shrinking feature sizes is still technically possible, but certainly not with the same promised economic benef... » read more

All Roads Point Up…But When?


One of the clear messages at Semicon West this month was that stacked die are coming soon. The only question is how soon. This isn’t so simple to answer. It depends on a lot of factors, and for most of them there aren’t any clear answers. First of all, no one is certain what the cost equation will look like at 14/16nm, particularly once the process technology becomes more mature. Ther... » read more

The Week In Review: Manufacturing


Looking to address a new wave of chip architectures in the marketplace, Applied Materials has rolled out its next-generation, medium-current ion implanter. The system, dubbed the VIISta 900 3D, is geared for the production of finFETs and 3D NAND designs at the sub-2xnm nodes. Typically, medium-current implanters have a maximum energy range of about 900keV (triple-charge), with dose ranges fr... » read more

Manufacturing Bits: July 1


Nanotubes in 4D The California Institute of Technology (Caltech) has continued to advance its efforts in four-dimensional electron microscopy. In 4D microscopy, electrons bombard a sample. Each electron scatters off the sample. This produces an image at just a femtosecond in duration. Then, millions of the images are stitched together, which, in turn, produces a digital movie in 4D. [cap... » read more

Can EDA Keep Growing?


Slower progress at the leading edge of process technology, coupled with rising costs and fewer design starts, are changing the economics of the EDA world. Not surprisingly, there is almost a direct correlation between the shrinking number of startups in the field and the number of customers working on the most advanced nodes. So what exactly does this mean for the EDA world? Big changes, for... » read more

Manufacturing Bits: June 24


A cup of sub-wavelength images The National Institute of Standards and Technology (NIST) and the University of Michigan have developed a technology that could enable sub-wavelength images at radio frequencies. Researchers used a mere glass cup, and laser light at optical wavelengths, to measure and image RF fields. In the future, this technology could measure the behavior of metamaterials. ... » read more

Mobile Packaging Market Heats Up


Apple, Samsung and others are developing the next wave of smartphones and tablets. OEMs want to cram more chip functions in smaller IC packages, but there are some challenges in the arena. In fact, there are signs that the mainstream packaging technology for mobiles is running out of steam. For some time, mobile products have incorporated a technology called package-on-package (PoP), which u... » read more

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