tag: AMD

Chiplet Reliability Challenges Ahead
By Ed Sperling - 12 Aug, 2020 - Comments: 2

Assembling chips using LEGO-like hard IP is finally beginning to take root, more than two decades after it was first proposed, holding the promise of faster time to market with predictable results and higher yield. But as these systems of chips begin showing up in mission-critical and safety-critical applications, ensuring reliability is proving to be stubbornly difficult. The main driver fo... » read more

Accellera Tackles Functional Safety
By Paul McLellan - 06 Aug, 2020 - Comments: 0

During DAC, Accellera had a workshop about functional safety. In case you don't know, Accellera has a relatively new working group (WG) on Functional Safety. The chair is Cadence's Alessandra Nardi, who coincidentally also received the Marie Pistilli Award for Women in EDA during DAC (you can read more about that in my post Alessandra Nardi Receives Marie Pistilli Award for Women in EDA). But ... » read more

Rethinking Competitive One Upmanship Among Foundries
By Ed Sperling - 03 Aug, 2020 - Comments: 2

The winner in the foundry business used to be determined by who got to the most advanced process node first. For the most part that benchmark no longer works. Unlike in the past, when all of the foundries and IDMs competed using basically the same process, each foundry has gone its own route. This is primarily due to the divergence of end markets, and the realization that as costs increase, ... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 31 Jul, 2020 - Comments: 0

Chipmakers and OEMs As reported, Intel this week reorganized its operations following delays with its 7nm technology. Intel is behind TSMC and Samsung in technology. As a result, TSMC’s foundry customers, such as AMD, Nvidia and others, are also pulling ahead of Intel. In addition, reports have surfaced that Intel will outsource some of its leading-edge chip production to TSMC. To solve t... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 17 Jul, 2020 - Comments: 0

Arm's parent company, Japanese tech conglomerate Softbank, reportedly is considering a sale or IPO of its Arm subsidiary, which it purchased in 2016 for $32 billion in cash. Considering that Arm chips are in most smart phones, as well as an increasing number of computers and IoT and edge devices, this development is being closely followed by most of the tech world. Last week, Softbank directed ... » read more

Power Impact At The Physical Layer Causes Downstream Effects
By Ann Mutschler - 09 Jul, 2020 - Comments: 0

Data movement is rapidly emerging as one of the top design challenges, and it is being complicated by new chip architectures and physical effects caused by increasing density at advanced nodes and in multi-chip systems. Until the introduction of the latest revs of high-bandwidth memory, as well as GDDR6, memory was considered the next big bottleneck. But other compute bottlenecks have been e... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 26 Jun, 2020 - Comments: 0

Fast Arm-based supercomputer Japan has taken the lead in the supercomputer race, jumping ahead of the U.S. But China continues to make its presence felt in the arena. Fugaku, an ARM-based supercomputer jointly developed by Japan’s Riken and Fujitsu, is now ranked the world’s fastest supercomputer in the 55th TOP500 list. Fugaku turned in a high performance Linpack (HPL) result of 415.5... » read more

Over-Design, Under-Design Impacts Verification
By Ann Mutschler - 25 Jun, 2020 - Comments: 0

Designing a complex chip today and getting it out the door on schedule and within budget — while including all of the necessary and anticipated features and standards — is forcing engineering teams to make more tradeoffs than in the past, and those tradeoffs now are occurring throughout the flow. In an ideal system design flow, design teams will have done early, pre-design analysis to se... » read more

Spreading Out The Cost At 3nm
By Ed Sperling - 18 Jun, 2020 - Comments: 5

The current model for semiconductor scaling doesn't add up. While it's possible that markets will consolidate around a few basic designs, the likelihood is that no single SoC will sell in enough volume to compensate for the increased cost of design, equipment, mask sets and significantly more testing and inspection. In fact, even with slew of derivative chips, it may not be enough to tip the ec... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 12 Jun, 2020 - Comments: 0

Edge, cloud, data center Programmable logic company Efinix used Cadence’s Digital Full Flow to finish Efinix’s Trion FPGA family for edge computing, AI/ML and vision processing applications, according to a press release. Last week Efinix also announced three software defined SoCs based on the RISC-V core. The SoCs are optimized to the Trion FPGAs. AI, machine learning Amazon will tempo... » read more

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