Low Power At The Edge


The tech world has come to the realization in recent months that there is far too much data to process everything in the cloud. Now it is starting to come to grips with what that really means for edge and near-edge computing. There still are no rules for where or how that data will be parsed, but there is a growing recognition that some level of pre-processing will be necessary, and that in tur... » read more

Mostly Upbeat Outlook For Chips


2019 has started with cautious optimism for the semiconductor industry, despite dark clouds that dot the horizon. Market segments such as cryptocurrencies and virtual reality are not living up to expectations, the market for smart phones appears to be saturated, and DRAM prices are dropping, leading to cut-backs in capital expenditures. EDA companies are talking about sales to China being pu... » read more

Fundamental Shifts In 2018


What surprised the industry in 2018?  While business has been strong, markets are changing, product categories are shifting and clouds are forming on the horizon. As 2018 comes to a close, most companies are pretty happy with the way everything turned out. Business has been booming, new product categories developing, and profits are meeting or beating market expectations. "2018 was indeed a... » read more

Foundries See Growth, New Issues In 2019


The silicon foundry business is poised for growth in 2019, although the industry faces several challenges across a number of market segments next year. Generally, foundry vendors saw steady growth in 2018, but many are ending the year on a sour note. Weak demand for Apple’s new iPhone XR and a downturn in the cryptocurrency market have impacted several IC suppliers and foundries, causing t... » read more

Collaborative IC Design Mandates Integrated Data Management


Due to complexity and multi-domain expertise, custom IC design typically requires a team to successfully design and verify the project. Often, specific blocks are assigned to team members based on analog, digital, MEMS, RF expertise, across multiple geographies, and separate verification team members focus on block and system validation. This means that unstructured design files with multiple c... » read more

Foundries Prepare For Battle At 22nm


After introducing new 22nm processes over the last year or two, foundries are gearing up the technology for production—and preparing for a showdown. GlobalFoundries, Intel, TSMC and UMC are developing and/or expanding their efforts at 22nm amid signs this node could generate substantial business for applications like automotive, IoT and wireless. But foundry customers face some tough choic... » read more

How To Improve Analog Design Reuse


Digital circuit design is largely automated today, but most analog components still are designed manually. This may change soon. As analog design grows increasingly complex and error-prone, design teams and tool vendors are focusing on how to automate as much of the design of analog circuits as possible. Analog design is notoriously difficult and varied. It can include anything from power ma... » read more

Week In Review: Design, Low Power


Tools OneSpin launched a formal verification tool that integrates with all major simulators, coverage databases and viewers, and chip design verification planning tools to provide a comprehensive view of verification progress. Comprised of two new formal apps, it can identify unreachable coverage points and provide them to the simulator to reduce wasted effort. Synopsys released the latest ... » read more

Wanted: Mask Equipment for Mature Nodes


Rising demand for chips at mature nodes is impacting the photomask supply chain, causing huge demand for trailing-edge masks and a shortfall of older mask equipment. The big issue is the equipment shortfall, which could impact customers on several fronts. Tool shortages could lead to longer mask turnaround times and delivery schedules for chips being developed at 90nm and above, which are bu... » read more

Power Delivery Affecting Performance At 7nm


Complex interactions and dependencies at 7nm and beyond can create unexpected performance drops in chips that cannot always be caught by signoff tools. This isn't for lack of effort. The amount of time spent trying to determine if an advanced-node chip will work after it is fabricated has been rising steadily for several process nodes. Additional design rules handle everything from variation... » read more

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