The History Of CMOS


Since CMOS has been around for about 50 years, a comprehensive history would be a book. This blog focuses on what I consider the major transitions. NMOS Before CMOS, there was NMOS (also PMOS, but I have no direct experience with that). An NMOS gate consisted of a network of N-transistors between the output and Vss, and a resistor (actually a transistor with an implant) between the output and... » read more

What Data Center Chipmakers Can Learn From Automotive


Automotive OEMs are demanding their semiconductor suppliers achieve a nearly unmeasurable target of 10 defective parts per billion (DPPB). Whether this is realistic remains to be seen, but systems companies are looking to emulate that level of quality for their data center SoCs. Building to that quality level is more expensive up front, although ultimately it can save costs versus having to ... » read more

Scatterometry-Based Methodologies For Characterization Of MRAM Technology


Magnetoresistive random-access memory (MRAM) technology and recent developments in fabrication processes have shown it to be compatible with Si-based complementary metal oxide semiconductor (CMOS) technologies. The perpendicular spin transfer torque MRAM (STT-MRAM) configuration opened up opportunities for an ultra-dense MRAM evolution and was most widely adapted for its scalability. Insertion ... » read more

MAC Operation on 28nm High-k Metal Gate FeFET-based Memory Array with ADC (Fraunhofer IPMS/GF)


A technical paper titled "Demonstration of Multiply-Accumulate Operation With 28 nm FeFET Crossbar Array" was published by researchers at Fraunhofer IPMS and GlobalFoundries. Abstract "This letter reports a linear multiply-accumulate (MAC) operation conducted on a crossbar memory array based on 28nm high-k metal gate (HKMG) Complementary Metal Oxide Semiconductor (CMOS) and ferroelectric fi... » read more

AI Feeds Vision Processor, Image Sensor Boom


Vision systems are rapidly becoming ubiquitous, driven by big improvements in image sensors as well as new types of sensors. While the sensor itself often is developed using mature-node silicon, increasingly it is connected to vision processors developed at the most advanced process nodes. That allows for the highest performance per watt, and it also allows designs to incorporate AI accelera... » read more

Foundational Changes In Chip Architectures


We take many things in the semiconductor world for granted, but what if some of the decisions made decades ago are no longer viable or optimal? We saw a small example with finFETs, where the planar transistor would no longer scale. Today we are facing several bigger disruptions that will have much larger ripple effects. Technology often progresses in a linear fashion. Each step provides incr... » read more

Robust Latch Hardened Against QNUs for Safety-Critical Applications in 22nm CMOS Technology


A technical paper titled "Cost-Optimized and Robust Latch Hardened against Quadruple Node Upsets for Nanoscale CMOS" was just published by researchers at Anhui University, Hefei University of Technology, Anhui Polytechnic University, Kyushu Institute of Technology, and the University of Montpellier/CNRS. Abstract: "With the aggressive reduction of CMOS transistor feature sizes, the soft ... » read more

Mass Producing Qubits (Imec and KU Leuven)


This new technical paper titled "Path toward manufacturable superconducting qubits with relaxation times exceeding 0.1 ms" was published by researchers at Imec and KU Leuven. Abstract "As the superconducting qubit platform matures towards ever-larger scales in the race towards a practical quantum computer, limitations due to qubit inhomogeneity through lack of process control become app... » read more

Cryogenic CMOS Becomes Cool


Cryogenic CMOS is a technology on the cusp, promising higher performance and lower power with no change in fabrication technology. The question now is whether it becomes viable and mainstream. Technologies often appear to be just on the horizon, not quite making it, but never too far out of sight. That's usually because some issue plagues it, and the incentive is not big enough to solve the ... » read more

Reservoir Computing HW Based on a CMOS-Compatible FeFET


A new technical paper titled "Reservoir computing on a silicon platform with a ferroelectric field-effect transistor" was published by researchers at the University of Tokyo. Researchers report "reservoir computing hardware based on a ferroelectric field-effect transistor (FeFET) consisting of silicon and ferroelectric hafnium zirconium oxide. The rich dynamics originating from the ferroelec... » read more

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