tag: IP

Complexity’s Impact On Security
By Ed Sperling - 01 May, 2019 - Comments: 0

Ben Levine, senior director of product management for Rambus’ Security Division, explains why security now depends on the growing number of components and the impact of interactions between those components. This is particularly problematic with AI chips, both on the training and inferencing side, where security problems on the training side can alter models for AI inferencing. » read more

Hardware Trojans And The Problem Of Trust In Integrated Circuits
By Sergio Marchese - 25 Apr, 2019 - Comments: 0

Electronic systems are at the core of an ever-increasing number of products and services. From power plants to automobiles, from medical devices to airplanes, from smartphones to home appliances, complex electronic systems enable an unprecedented level of automation, performance, safety, and security. Integrated circuits (ICs) are the backbone of these systems. It is of paramount importance tha... » read more

When Verification Leads
By Brian Bailey - 25 Apr, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss the implications of having an executable specification that drives verification with Hagai Arbel, CEO for VTool; Adnan Hamid, CEO for Breker Verification; Mark Olen, product marketing manager for Mentor, a Siemens Business; Jim Hogan, managing partner of Vista Ventures; Sharon Rosenberg, senior solutions architect for Cadence Design Systems; and Tom... » read more

CDNLive 2019: The Verification Ecosystem Is Growing Stronger And Stronger
By Frank Schirrmeister - 25 Apr, 2019 - Comments: 0

Ecosystems are not only fascinating when it comes to processors like Arm, MIPS, x86, and RISC-V (as I have written before) or for semiconductor technologies like TSMC, GLOBALFOUNDRIES, and Samsung; they are key for success in verification as well. CDNLive Silicon Valley was, again, a great example of the verification ecosystem in action. It showcased the different engines verification tools run... » read more

The Case For Embedded FPGAs Strengthens And Widens
By Brian Bailey - 25 Apr, 2019 - Comments: 2

The embedded FPGA, an IP core integrated into an ASIC or SoC, is winning converts. System architects are starting to see the benefits of eFPGAs, which offer the flexibility of programmable logic without the cost of FPGAs. Programmable logic is especially appealing for accelerating machine learning applications that need frequent updates. An eFPGA can provide some architects the cover they ne... » read more

The Precision Knob
By Ed Sperling - 18 Apr, 2019 - Comments: 0

Precision used to be a goal, but increasingly it is being used as a tool. This is true for processing and algorithms, where less precision can greatly improve both performance and battery life. And it is true in manufacturing, where more precision can help minimize the growing impact of variation. Moreover, being able to dial precision up or down can help engineers see the impact on a system... » read more

EDA, IP Revenue Down
By Ed Sperling - 15 Apr, 2019 - Comments: 0

EDA and IP revenue dropped 3.1% in Q4 2018 to $2.570 billion, versus $2.652 billion in the same period in 2017, ending a streak of 11 consecutive positive quarters of growth, according to the statistics released today by the Electronic System Design (ESD) Alliance. One quarter doesn't indicate a trend, but it certainly gets everyone's attention after nearly three years of positive news. Now ... » read more

The Long And Detailed Road To Automotive Compliance
By Ann Mutschler - 04 Apr, 2019 - Comments: 0

Compliance with automotive safety requirements is slowing down both innovation and participation by a flurry of startups as the whole ecosystem struggles to bring autonomous vehicles to reality. This is particularly onerous for chipmakers, which face a high bar for IC integrity and reliability. They must meet specifications and be free of design errors. Improper behavior in corner-case s... » read more

Fibonacci And Honey Bees Have Something In Common: A Sweet Spot For Formal
By Sergio Marchese - 28 Mar, 2019 - Comments: 0

Time flies and the OneSpin’s Holiday Puzzle tradition has reached its third year. In December 2016, OneSpin challenged engineers everywhere to solve the Einstein riddle using assertions and a formal verification tool. In December 2017, the challenge was to model the hardest Sudoku in the world using assertions and find a solution with a formal tool. In addition, participants had to prove that... » read more

Using Less Power At The Same Node
By Brian Bailey - 14 Mar, 2019 - Comments: 0

Going to the next node has been the most effective way to reduce power, but that is no longer true or desirable for a growing percentage of the semiconductor industry. So the big question now is how to reduce power while maintaining the same node size. After understanding how the power is used, both chip designers and fabs have techniques available to reduce power consumption. Fabs are makin... » read more

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